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SI51210-AXXXFMR データシート(PDF) 8 Page - Silicon Laboratories |
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SI51210-AXXXFMR データシート(HTML) 8 Page - Silicon Laboratories |
8 / 12 page Si51210 8 Preliminary Rev. 0.7 4. Pin Descriptions: 6-Pin TDFN Table 5. Si51210 6-Pin Descriptions Pin # Name Type Description 1 VDD PWR 2.5 to 3.3 V power supply. 2 XIN/CLKIN I External crystal and clock input. 3 XOUT O Crystal output. Leave this pin unconnected (floating) if an external clock input is used. 4 SSCLK1/REFCLK/ FSEL/SSEL/SSON/ OE2 I/O Programmable SSCLK1 or REFCLK output or MultiFunction control input. The frequency at this pin is synthesized by internal PLL if pro- grammed as SSCLK1 with or without spread. If programmed as REF- CLK, output clock is buffered output of crystal or reference clock input. If programmed as MultiFunction control input, it can be OE, FSEL, SSEL and SSON. 5 SSCLK2/REFCLK_D/ OE1/FSEL/SSEL/ SSON/PD I/O Programmable SSCLK2 or REFCLK_D output or MultiFunction control input. The frequency at this pin is synthesized by internal PLL if pro- grammed as SSCLK2 with or without spread. If programmed as REFCLK_D, output clock is buffered output of crystal or reference clock input divided by 2 to 32. If programmed as MultiFunction control input, it can be OE, PD, FSEL, SSEL and SSON. 6 VSS GND Ground. 6 5 4 1 2 3 VSS SSCLK2/REFCLK_D FSEL/SSEL/ SSON/PD/OE1 SSCLK1/REFCLK FSEL/SSEL/ SSON/OE2 VDD XOUT XIN/CLKIN Si51210 |
同様の部品番号 - SI51210-AXXXFMR |
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同様の説明 - SI51210-AXXXFMR |
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