SN74AHCT00QQ1

QUADRUPLE 2INPUT POSITIVENAND GATE

SGDS007B − MAY 1998 − REVISED APRIL 2008

1

POST OFFICE BOX 655303

CMOS) Process

JESD 17

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

description

The SN74AHCT00Q performs the Boolean function Y = A

• B or Y = A + B in positive logic.

TA

PACKAGE‡

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

−40

°C to 125°C

SOIC − D

Tape and reel

SN74AHCT00QDRQ1

AHCT00Q

−40

°C to 125°C

TSSOP − PW

Tape and reel

SN74AHCT00QPWRQ1

HB00Q

† For the most current package and ordering information, see the Package Option Addendum at the end of this

document, or see the TI web site at http://www.ti.com.

‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.

FUNCTION TABLE

(each gate)

INPUTS

OUTPUT

A

B

OUTPUT

Y

H

H

L

L

XH

X

L

H

1

1A

2

1B

1Y

3

4

2A

5

2B

2Y

6

9

3A

10

3B

3Y

8

12

4A

13

4B

4Y

11

&

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1

2

3

4

5

6

7

14

13

12

11

10

9

8

1A

1B

1Y

2A

2B

2Y

GND

4B

4A

4Y

3B

3A

3Y

D OR PW PACKAGE

(TOP VIEW)

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Copyright

 2008, Texas Instruments Incorporated

EPIC is a trademark of Texas Instruments.