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TC74VHC174F データシート(PDF) 5 Page - Toshiba Semiconductor |
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TC74VHC174F データシート(HTML) 5 Page - Toshiba Semiconductor |
5 / 10 page TC74VHC174F/FT/FK 2012-02-29 5 AC Characteristics (input: tr = tf = 3 ns) Test Condition Ta = 25°C Ta = −40 to 85°C Characteristics Symbol VCC (V) CL (pF) Min Typ. Max Min Max Unit 15 ― 7.2 11.0 1.0 13.0 3.3 ± 0.3 50 ― 9.7 14.5 1.0 16.5 15 ― 4.9 7.2 1.0 8.5 Propagation delay time (CK-Q) tpLH tpHL ― 5.0 ± 0.5 50 ― 6.4 9.2 1.0 10.5 ns 15 ― 7.4 11.4 1.0 13.5 3.3 ± 0.3 50 ― 9.9 14.9 1.0 17.0 15 ― 5.1 7.6 1.0 9.0 Propagation delay time ( CLR -Q) tpHL ― 5.0 ± 0.5 50 ― 6.6 9.6 1.0 11.0 ns 15 95 150 ― 80 ― 3.3 ± 0.3 50 55 85 ― 50 ― 15 130 175 ― 110 ― Maximum clock frequency fmax ― 5.0 ± 0.5 50 90 120 ― 80 ― MHz 3.3 ± 0.3 50 ― ― 1.5 ― 1.5 Output to output skew tosLH tosHL (Note 1) 5.5 ± 0.5 50 ― ― 1.0 ― 1.0 ns Input capacitance CIN ― ― 4 10 ― 10 pF Power dissipation capacitance CPD (Note 2) ― 29 ― ― ― pF Note 1: Parameter guaranteed by design. tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn| Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD·VCC·fIN + ICC/6 (per F/F) And the total CPD when n pcs. of flip flop operate can be gained by the following equation: CPD (total) = 19 + 10·n Noise Characteristics (input: tr = tf = 3 ns) Test Condition Ta = 25°C Characteristics Symbol VCC (V) Typ. Max Unit Quiet output maximum dynamic VOL VOLP CL = 50 pF 5.0 0.4 0.8 V Quiet output minimum dynamic VOL VOLV CL = 50 pF 5.0 −0.4 −0.8 V Minimum high level dynamic input voltage VIHD CL = 50 pF 5.0 ― 3.5 V Maximum low level dynamic input voltage VILD CL = 50 pF 5.0 ― 1.5 V |
同様の部品番号 - TC74VHC174F_12 |
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同様の説明 - TC74VHC174F_12 |
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