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AD1847 データシート(PDF) 7 Page - Analog Devices |
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AD1847 データシート(HTML) 7 Page - Analog Devices |
7 / 28 page AD1847 REV. B –7– Miscellaneous Pin Name PLCC TQFP I/O Description XTAL1I 40 34 I 24.576 MHz Crystal #1 Input. XTAL1O 41 35 O 24.576 MHz Crystal #1 Output. XTAL2I 42 36 I 16.9344 MHz Crystal #2 Input. XTAL2O 43 37 O 16.9344 MHz Crystal #2 Output. XCTL1:O 37 & 36 31 & 30 O External Control. These TTL signals reflect the current status of register bits inside the AD1847. They can be used for signaling or to control external logic. VREF 16 10 O Voltage Reference. Nominal 2.25 volt reference available externally as a voltage datum for dc-coupling and level-shifting. VREF should not have any signal dependent load. VREFI 15 9 I Voltage Reference Internal. Voltage reference filter point for external bypassing only. L_FILT 21 15 I Left Channel Filter Capacitor. This pin requires a 1.0 µF capacitor to analog ground for proper operation. R_FILT 19 13 I Right Channel Filter Capacitor. This pin requires a 1.0 µF capacitor to analog ground for proper operation. NC 29 23 No Connect. Do not connect. Power Supplies Pin Name PLCC TQFP I/O Description VCC 13 & 25 7 & 19 I Analog Supply Voltage (+5 V). GNDA 14, 20, 24 8, 14, 18 I Analog Ground. VDD 2, 9, 34, 39 40, 3, 28, 33 I Digital Supply Voltage (+5 V). GNDD 3, 10, 35, 38 41, 4, 29, 32 I Digital Ground. (Continued from page 1) The ∑∆ DACs are preceded by a digital interpolation filter. An attenuator provides independent user volume control over each DAC channel. Nyquist images are removed from the DACs’ analog stereo output by on-chip switched-capacitor and continuous-time filters. Two stereo pairs of auxiliary line-level inputs can also be mixed in the analog domain with the DAC output. The AD1847 serial data interface uses a Time Division Multi- plex (TDM) scheme that is compatible with DSP serial ports configured in Multi-Channel Mode with 32 16-bit time slots (i.e., SPORT0 on the ADSP-2101, ADSP-2115, etc.). AUDIO FUNCTIONAL DESCRIPTION This section overviews the functionality of the AD1847 and is intended as a general introduction to the capabilities of the de- vice. As much as possible, detailed reference information has been placed in “Control Registers” and other sections. The user is not expected to refer repeatedly to this section. Analog Inputs The AD1847 SoundPort Stereo Codec accepts stereo line-level inputs. All inputs should be capacitively coupled (ac-coupled) to the AD1847. LINE1, LINE2, and AUX1, and post-mixed DAC output analog stereo signals are multiplexed to the internal pro- grammable gain amplifier (PGA) stage. The PGA following the input multiplexer allows independent selectable gains for each channel from 0 to 22.5 dB in +1.5 dB steps. The Codec can operate either in a global stereo mode or in a global mono mode with left-channel inputs appearing at both channel outputs. Analog Mixing AUX1 and AUX2 analog stereo signals can be mixed in the ana- log domain with the DAC output. Each channel of each auxil- iary analog input can be independently gained/attenuated from +12 dB to –34.5 dB in –1.5 dB steps or completely muted. The post-mixed DAC output is available on L_OUT and R_OUT externally and as an input to the ADCs. Even if the AD1847 is not playing back data from its DACs, the analog mix function can still be active. Analog-to-Digital Datapath The ∑∆ ADCs incorporate a proprietary fourth-order modula- tor. A single pole of passive filtering is all that is required for antialiasing the analog input because of the ADC’s high 64 times oversampling ratio. The ADCs include digital decimation filters that low-pass filter the input to 0.4 FS. (“FS’’ is the word rate or “sampling frequency.”) ADC input overrange con- ditions will cause status bits to be set that can be read. Digital-to-Analog Datapath The ∑∆ DACs contain a programmable attenuator and a low- pass digital interpolation filter. The anti-imaging interpolation filter oversamples and digitally filters the higher frequency im- ages. The attenuator allows independent control of each DAC channel from 0 dB to –94.5 dB in 1.5 dB steps plus full mute. The DACs’ ∑∆ noise shapers also oversample and convert the signal to a single-bit stream. The DAC outputs are then filtered in the analog domain by a combination of switched-capacitor and continuous-time filters. These filters remove the very high frequency components of the DAC bitstream output. No exter- nal components are required. |
同様の部品番号 - AD1847 |
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同様の説明 - AD1847 |
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