データシートサーチシステム |
|
AD5206BR10 データシート(PDF) 8 Page - Analog Devices |
|
AD5206BR10 データシート(HTML) 8 Page - Analog Devices |
8 / 11 page AD5204/AD5206 –8– REV. 0 OPERATION The AD5204/AD5206 provides a four-/six-channel, 256-position digitally-controlled variable resistor (VR) device. Changing the programmed VR settings is accomplished by clocking in a 11- bit serial data word into the SDI (Serial Data Input) pin. The format of this data word is three address bits, MSB first, fol- lowed by eight data bits, MSB first. Table I provides the serial register data word format. Table I. Serial-Data Word Format ADDR DATA B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 MSB LSB MSB LSB 210 28 27 20 See Table IV for the AD5204/AD5206 address assignments to decode the location of VR latch receiving the serial register data in Bits B7 through B0. VR outputs can be changed one at a time in random sequence. The AD5204 presets to a midscale by asserting the PR pin, simplifying fault condition recovery at power up. Both parts have an internal power ON preset that places the wiper in a preset midscale condition at power ON. In addition, the AD5204 contains a power shutdown SHDN pin which places the RDAC in a zero power consumption state where Terminals Ax are open circuited and the wiper Wx is connected to Bx resulting in only leakage currents being con- sumed in the VR structure. In shutdown mode the VR latch settings are maintained, so that, returning to operational mode from power shutdown, the VR settings return to their previous resistance values. Ax Wx Bx RS RS RS RS SHDN D7 D6 D5 D4 D3 D2 D1 D0 RDAC LATCH & DECODER Figure 16. AD5204/AD5206 Equivalent RDAC Circuit PROGRAMMING THE VARIABLE RESISTOR Rheostat Operation The nominal resistance of the RDAC between Terminals A and B are available with values of 10 k Ω, 50 kΩ and 100 kΩ. The last digits of the part number determine the nominal resistance value, e.g., 10 k Ω = 10; 100 kΩ = 100. The nominal resistance (RAB) of the VR has 256 contact points accessed by the wiper terminal, plus the B terminal contact. The eight-bit data word in the RDAC latch is decoded to select one of the 256 possible settings. The wiper’s first connection starts at the B terminal for data 00H. This B terminal connection has a wiper contact resis- tance of 45 Ω. The second connection (10 kΩ part) is the first tap point located at 84 Ω [= R BA (nominal resistance)/256 + RW = 84 Ω + 45 Ω] for data 01 H. The third connection is the next tap point representing 78 + 45 = 123 Ω for data 02 H. Each LSB data value increase moves the wiper up the resistor ladder until the last tap point is reached at 10006 Ω. The wiper does not directly connect to the A terminal. See Figure 16 for a simplified diagram of the equivalent RDAC circuit. The general transfer equation determining the digitally pro- grammed output resistance between Wx and Bx is: RWB (Dx) = (Dx)/256 × R BA + RW (1) where Dx is the data contained in the 8-bit RDACx latch, and RBA is the nominal end-to-end resistance. For example, when VB = 0 V and A terminal is open-circuit, the following output resistance values will be set for the following RDAC latch codes (applies to the 10K potentiometer): Table II. D (DEC) RWB- Output State 255 10006 Full Scale 128 5045 Midscale ( PR = 0 Condition) 184 1 LSB 0 45 Zero Scale (Wiper Contact Resistance) Note that in the zero-scale condition a finite wiper resistance of 45 Ω is present. Care should be taken to limit the current flow between W and B in this state to a maximum value of 20 mA to avoid degradation or possible destruction of the internal switch contact. Like the mechanical potentiometer the RDAC replaces, it is totally symmetrical. The resistance between the Wiper W and Terminal A produces a digitally controlled resistance RWA. When these terminals are used the B terminal should be tied to the wiper. Setting the resistance value for RWA starts at a maxi- mum value of resistance and decreases as the data loaded in the latch is increased in value. The general transfer equation for this operation is: RWA (Dx) = (256–Dx)/256 × R BA + RW (2) where Dx is the data contained in the 8-bit RDACx latch, and RBA is the nominal end-to-end resistance. For example, when VA = 0 V and B terminal is tied to the Wiper W the following output resistance values will be set for the following RDAC latch codes: Table III. D (DEC) RWA- Output State 255 84 Full Scale 128 5045 Midscale ( PR = 0 Condition) 1 10006 1 LSB 0 10045 Zero Scale |
同様の部品番号 - AD5206BR10 |
|
同様の説明 - AD5206BR10 |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |