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AD53508 データシート(PDF) 5 Page - Analog Devices

部品番号 AD53508
部品情報  PPMU Circuit
Download  8 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD53508 データシート(HTML) 5 Page - Analog Devices

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AD53508
–5–
REV. 0
Table I. Data Table
Data Latch Bits
S13,
S15,
S1
S2
S3
S4
S5
S6
S7
S9
S17
S8
S10
S14
S16
S11
S12
S18
Voltage Force/Current Measure
Irange 0
On
Off
OnOnOff
On
Off
Off
Off
OnOnOnOff
Off
Off
On
Irange 1
On
Off
OnOnOff
On
Off
Off
Off
OnOnOff
On
Off
Off
On
Integrate Range
On
Off
OnOnOff
On
Off
Off
Off
OnOnOff
Off
OnOnOn
Integrate
On
Off
On
On
Off
On
Off
Off
Off
On
Off
Off
Off
On
On
On
Hold/Measure
On
Off
OnOnOff
On
Off
OnOnOff
Off
Off
Off
Off
On
On
Current Force/Voltage Measure
Irange 0
On
On
Off
Off
On
On
Off
Off
Off
On
On
On
Off
Off
Off
On
Irange 1
On
On
Off
Off
On
On
Off
Off
Off
On
On
Off
On
Off
Off
On
Disable Mode: Output Connected
XXXOn
Off
Off
On
Off
Off
On
X
On
Off
Off
Off
On
Verify/Voltage Force
On
On
Off
OnOff
On
Off
Off
Off
OnOnOnOff
Off
Off
On
Verify/Current Force
On
Off
OnOff
On
On
Off
Off
Off
OnOnOnOff
Off
Off
On
Disconnect
XXXOn
Off
XXOn
Off
Off
On
Off
Off
Off
On
Off
DAC2 Select: Enabled
XXXXXOff
On
XXXXXXXXX
CAPACITOR
CHARGE
INTEGRATE*
HOLD*
INTEGRATE
HOLD
DISCHARGE
CAPACITOR
* = ACTIVE LO
Figure 1. Integrate/Current Measure Timing Diagram
Table II. Truth Table
* = Active LO
FV/MI 2 mA
FV/MI 200 mA
FV/MI Integrate DAC1
FV/MI Integrate DAC 2
FI/MV 2 mA
FI/MV 200
µA
FV/Verify
FI/Verify
Disconnect
Disable
Control
Voltage
Inte-
Voltage
Inte-
Output
Input
DAC1
DAC2
DAC1
DAC2
Settle
grate
Hold
Settle
grate
Hold
DAC1
DAC2
DAC1
DAC2
DAC1
DAC2
DAC1
DAC2
Connected
M_CON*
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
X
X
VERIFY*
HI
HI
HI
HI
HI
HI
HI
HI
HI
HI
HI
HI
HI
HI
LO
LO
LO
LO
X
X
FORCE_I*
HI
HI
HI
HI
HI
HI
HI
HI
HI
HI
LO
LO
LO
LO
HI
HI
LO
LO
X
X
FORCE_EN*
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
X
HI
DAC1_SEL*
LO
HI
LO
HI
LO
LO
LO
HI
HI
HI
LO
HI
LO
HI
LO
HI
LO
HI
X
X
INTEG*
HIHI
HIHIHI
LO
LO
HI
LO
LO
HI
HIHIHI
HIHIHI
HI
X
X
HOLD*
HIHI
HIHIHI
HILO
HI
HILO
HI
HIHIHI
HIHIHI
HI
X
X
I_RANGE0*
LO
LO
HI
HI
HI
HI
HI
HI
HI
HI
LO
LO
HI
HI
X
X
X
X
X
X
I_RANGE1*
HI
HI
LO
LO
HI
HI
HI
HI
HI
HI
HI
HI
LO
LO
X
X
X
X
X
X
OUTPUT_CON*
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
HI
LO


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