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AD633 データシート(PDF) 4 Page - Analog Devices |
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AD633 データシート(HTML) 4 Page - Analog Devices |
4 / 8 page REV. B AD633 –4– 0.1 F +15V E W = E2 10V 8 7 6 5 1 2 3 4 AD633JN 0.1 F X1 X2 Y1 Y2 –VS +VS W Z –15V C R R1 1k R2 3k Figure 5. ”Bounceless” Frequency Doubler At ω o = 1/CR, the X input leads the input signal by 45 ° (and is attenuated by √2), and the Y input lags the X input by 45° (and is also attenuated by √2). Since the X and Y inputs are 90° out of phase, the response of the circuit will be (satisfying Equation 3): W V E t E t E V t oo o = ( ) +° ( ) −° ( ) = ( ) ( ) 1 10 2 45 2 45 40 2 2 sin sin sin ωω ω (Equation 4) which has no dc component. Resistors R1 and R2 are included to restore the output amplitude to 10 V for an input amplitude of 10 V. The amplitude of the output is only a weak function of fre- quency: the output amplitude will be 0.5% too low at ω = 0.9 ω o, and ω o = 1.1 ω o. Generating Inverse Functions Inverse functions of multiplication, such as division and square rooting, can be implemented by placing a multiplier in the feed- back loop of an op amp. Figure 6 shows how to implement a square rooter with the transfer function WV E =− ( ) 10 (Equation 5) for the condition E<0. 0.1 F +15V E 8 7 6 5 1 2 3 4 AD633JN 0.1 F X1 X2 Y1 Y2 –VS +VS W Z –15V W = –(10V)E 0.1 F 0.1 F R 10k 1N4148 R 10k +15 –15 AD711 Figure 6. Connections for Square Rooting 0.1 F +15V E 8 7 6 5 1 2 3 4 AD633JN 0.1 F X1 X2 Y1 Y2 –VS +VS W Z –15V W = –10V E EX 0.1 F 0.1 F R 10k 1N4148 R 10k +15 –15 EX AD711 Figure 7. Connections for Division Likewise, Figure 7 shows how to implement a divider using a multiplier in a feedback loop. The transfer function for the divider is WV E EX =− ( ) 10 (Equation 6) 0.1 F +15V 8 7 6 5 1 2 3 4 AD633JN 0.1 F X1 X2 Y1 Y2 –VS +VS W Z –15V R1 R2 W = (X1 – X2) (Y1 – Y2) + S 10V X INPUT Y INPUT (R1 + R2) R1 1k R1, R2 100k S Figure 8. Connections for Variable Scale Factor Variable Scale Factor In some instances, it may be desirable to use a scaling voltage other than 10 V. The connections shown in Figure 8 increase the gain of the system by the ratio (R1 + R2)/R1. This ratio is limited to 100 in practical applications. The summing input, S, may be used to add an additional signal to the output or it may be grounded. Current Output The AD633’s voltage output can be converted to a current output by the addition of a resistor R between the AD633’s W and Z pins as shown in Figure 9 below. This arrangement forms (X1 – X2) (Y1 – Y2) 10V 1 R IO = X INPUT 0.1 F +15V –15V 8 7 6 5 1 2 3 4 AD633JN 0.1 F X1 X2 Y1 Y2 –VS +VS W Z Y INPUT 1k R 100k R Figure 9. Current Output Connections |
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同様の説明 - AD633 |
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