AD7538

REV. A

–4–

TERMINOLOGY

RELATIVE ACCURACY

Relative accuracy or endpoint nonlinearity is a measure of the

maximum deviation from a straight line passing through the

endpoints of the DAC transfer function. It is measured after ad-

justing for zero error and full-scale error and is normally ex-

pressed in Least Significant Bits or as a percentage of full-scale

reading.

DIFFERENTIAL NONLINEARITY

Differential nonlinearity is the difference between the measured

change and the ideal 1 LSB change between any two adjacent

codes. A specified differential nonlinearity of

±1 LSB max over

the operating temperature range ensures monotonicity.

GAIN ERROR

Gain error is a measure of the output error between an ideal

DAC and the actual device output. It is measured with all 1s in

the DAC after offset error has been adjusted out and is expressed

in Least Significant Bits. Gain error is adjustable to zero with an

external potentiometer.

DIGITAL-TO-ANALOG GLITCH IMPULSE

The amount of charge injected from the digital inputs to the

analog output when the inputs change state is called Digital-

to-Analog Glitch Impulse. This is normally specified as the area

of the glitch in either pA-secs or nV-secs depending upon

whether the glitch is measured as a current or voltage. It is mea-

OUTPUT CAPACITANCE

OUTPUT LEAKAGE CURRENT

the DAC register loaded to all 0s.

MULTIPLYING FEEDTHROUGH ERROR

ORDERING GUIDE

Temperature

Relative

Full-Scale

Package

Model

Range

Accuracy

Error

Option*

AD7538JN

0

°C to +70°C

±2 LSB

±8 LSB

N-24

AD7538KN

0

°C to +70°C

±1 LSB

±4 LSB

N-24

AD7538JR

0

°C to +70°C

±2 LSB

±8 LSB

R-24

AD7538KR

0

°C to +70°C

±1 LSB

±4 LSB

R-24

AD7538AQ

–25

°C to +85°C

±2 LSB

±8 LSB

Q-24

AD7538BQ

–25

°C to +85°C

±1 LSB

±4 LSB

Q-24

AD7538SQ

–55

°C to +125°C

±2 LSB

±8 LSB

Q-24

AD7538TQ

–55

°C to +125°C

±1 LSB

±4 LSB

Q-24

*N = Plastic DIP; Q = Cerdip; R = SOIC.

PIN FUNCTION DESCRIPTION

Pin

Mnemonic

Description

Voltage Reference.

Feedback Resistor. Used to close the loop around an external op amp.

Current Output Terminal.

AGND

Analog Ground

DGND

Digital Ground

6–19

DB13–DB0

Data Inputs. Bit 13 (MSB) to Bit 0 (LSB).

20

LDAC

Chip Select Input. Active LOW.

21

CS

Asynchronous Load DAC Input. Active LOW.

22

WR

Write Input. Active LOW.

CS

LDAC

WR

OPERATION

0

1

0

Load Input Register.

1

0

X

Load DAC Register from Input Register.

0

0

0

Input and DAC Registers are Transparent.

1

1

X

No Operation.

X

1

1

No Operation.

NOTE: X Don’t Care.

23

+12 V to +15 V supply input.

24

Bias pin for High Temperature Low Leakage configuration. To implement low leakage

system, the pin should be at a negative voltage. See Figures 4 and 5 for recommended circuitry.