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AD7713AN データシート(PDF) 2 Page - Analog Devices

部品番号 AD7713AN
部品情報  LC2MOS Loop-Powered Signal Conditioning ADC
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD7713AN データシート(HTML) 2 Page - Analog Devices

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Parameter
A, S Versions
1
Units
Conditions/Comments
STATIC PERFORMANCE
No Missing Codes
24
Bits min
Guaranteed by Design. For Filter Notches
≤ 12 Hz
22
Bits min
For Filter Notch = 20 Hz
18
Bits min
For Filter Notch = 50 Hz
15
Bits min
For Filter Notch = 100 Hz
12
Bits min
For Filter Notch = 200 Hz
Output Noise
See Tables I & II
Depends on Filter Cutoffs and Selected Gain
Integral Nonlinearity
±0.0015
% of FSR max
Filter Notches
≤ 12 Hz; Typically ±0.0003%
Positive Full-Scale Error2, 3
See Note 4
Full-Scale Drift
5
1
µV/°C typ
For Gains of 1, 2
0.3
µV/°C typ
For Gains of 4, 8, 16, 32, 64, 128
Unipolar Offset Error
2
See Note 4
Unipolar Offset Drift5
0.5
µV/°C typ
For Gains of 1, 2
0.25
µV/°C typ
For Gains of 4, 8, 16, 32, 64, 128
Bipolar Zero Error2
See Note 4
Bipolar Zero Drift
5
0.5
µV/°C typ
For Gains of 1, 2
0.25
µV/°C typ
For Gains of 4, 8, 16, 32, 64, 128
Gain Drift
2
ppm/
°C typ
Bipolar Negative Full-Scale Error2
±0.004
% of FSR max
Typically
±0.0006%
Bipolar Negative Full-Scale Drift
5
1
µV/°C typ
For Gains of 1, 2
0.3
µV/°C typ
For Gains of 4, 8, 16, 32, 64, 128
ANALOG INPUTS
Input Sampling Rate, fS
See Table III
Normal-Mode 50 Hz Rejection
6
100
dB min
For Filter Notches of 2 Hz, 5 Hz, 10 Hz, 25 Hz, 50 Hz,
±0.02 × f
NOTCH
Normal-Mode 60 Hz Rejection6
100
dB min
For Filter Notches of 2 Hz, 6 Hz, 10 Hz, 30 Hz, 60 Hz,
±0.02 × f
NOTCH
AIN1, AIN2
7
Input Voltage Range8
For Normal Operation. Depends on Gain Selected.
0 to +VREF
9
V max
Unipolar Input Range (B/U Bit of Control Register = 1)
±V
REF
V max
Bipolar Input Range (B/U Bit of Control Register = 0)
Common-Mode Rejection (CMR)
100
dB min
At DC
Common-Mode 50 Hz Rejection6
150
dB min
For Filter Notches of 2 Hz, 5 Hz, 10 Hz, 25 Hz, 50 Hz,
±0.02 × f
NOTCH
Common-Mode 60 Hz Rejection
6
150
dB min
For Filter Notches of 2 Hz, 6 Hz, 10 Hz, 30 Hz, 60 Hz,
±0.02 × f
NOTCH
Common-Mode Voltage Range
10
AGND to AVDD
V min to V max
DC Input Leakage Current @ +25
°C
10
pA max
TMIN to TMAX
1
nA max
Sampling Capacitance
6
20
pF max
AIN3
Input Voltage Range
0 to + 4
× V
REF
V max
For Normal Operation. Depends on Gain Selected
Gain Error
11
±0.05
% typ
Additional Error Contributed by Resistor Attenuator
Gain Drift
1
ppm/
°C typ
Additional Drift Contributed by Resistor Attenuator
Offset Error
11
4
mV max
Additional Error Contributed by Resistor Attenuator
Input Impedance
30
k
Ω min
NOTES
1Temperature range is as follows: A Version, –40
°C to +85°C; S Version, –55°C to +125°C.
2Applies after calibration at the temperature of interest.
3Positive full-scale error applies to both unipolar and bipolar input ranges.
4These errors will be of the order of the output noise of the part as shown in Table I after system calibration. These errors will be 20
µV typical after self-calibration
or background calibration.
5Recalibration at any temperature or use of the background calibration mode will remove these drift errors.
6These numbers are guaranteed by design and/or characterization.
7The AIN1 and AIN2 analog inputs presents a very high impedance dynamic load which varies with clock frequency and input sample rate. The maximum
recommended source resistance depends on the selected gain.
8The analog input voltage range on the AIN1(+) and AIN2(+) inputs is given here with respect to the voltage on the AIN1(–) and AIN2 (–) inputs. The input
voltage range on the AIN3 input is with respect to AGND. The absolute voltage on the AIN1 and AIN2 inputs should not go more positive than A VDD + 30 mV or
more negative than AGND – 30 mV.
9V
REF = REF IN(+) – REF IN(–).
10This common-mode voltage range is allowed provided that the input voltage on AIN(+) and AIN(–) does not exceed A V
DD + 30 mV and AGND – 30 mV.
11This error can be removed using the system calibration capabilities of the AD7713. This error is not removed by the AD7713’s self-calibration feature. The offset
drift on the AIN3 input is four times the value given in the Static Performance section.
–2–
REV. C
(AVDD = +5 V
5%; DVDD = +5 V
5%; REF IN(+) = +2.5 V; REF IN(–) = AGND;
MCLK IN = 2 MHz unless otherwise noted. All specifications TMIN to TMAX unless otherwise noted.)
AD7713–SPECIFICATIONS


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