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AD807A-155BRRL データシート(PDF) 10 Page - Analog Devices

部品番号 AD807A-155BRRL
部品情報  Fiber Optic Receiver with Quantizer and Clock Recovery and Data Retiming
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD807A-155BRRL データシート(HTML) 10 Page - Analog Devices

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REV. A
–10–
AD807
NC = NO CONNECT
1
2
3
4
8
7
6
5
1
2
5
6
7
3
4
8
16
15
12
11
10
14
13
9
VEE
SDOUT
AVCC
PIN
NIN
AVCC
THRADJ
AVEE
AD807
NC
IIN
NC
VBYP
+VS
+OUT
–VS
–OUT
R10
154
R9
154
R6 100
C7
R5 100
R1
100
R2
100
C1 0.1µF
C2
0.1µF
C3
0.1µF
DATAOUTN
DATAOUTP
CLKOUTN
CLKOUTP
C4
0.1µF
C6
0.1µF
R4
100
R8 100
R7 100
R3
100
C8
R12
154
TP1
TP2
R11
154
C5
0.1µF
CD
TP7
SDOUT
C11
TP6
TP5
R13
THRADJ
C9
10µF
C10
GND
TP4
R14
50
R15
50
R16
301
R17
3.65k
C13
0.1µF
5V TP3
AD8015
C15
0.1µF
15pF
10µF
0.1µF
15pF
0.1µF
0.01µF
ABB HAFO 1A227
FC HOUSING
0.8 A/W, 0.7pF
2.5GHz
NOTES
1. ALL CAPS ARE CHIP,
15pF ARE MICA.
2. 150nH ARE SMT
C14
0.1µF
50
LINE
50
LINE
C12
2.2µF
150nH
150nH
DATAOUTN
DATAOUTP
VCC2
CLKOUTN
CLKOUTP
VCC1
CF1
CF2
Figure 23. Low Cost 155 Mbps Fiber Optic Receiver Schematic
Table I. AD807—AD8015 Fiber Optic Receiver Circuit:
Output Bit Error Rate & Output Jitter vs. Input Power
Average Optical
Input Power
Output Bit
Output Jitter
(dBm)
Error Rate
(ps rms)
–6.4
Loses Lock
–6.5
7.5
× 10–3
–6.6
9.4
× 10–4
–6.7
0
× 10–14
–7.0 to –35.5
0
× 10–14
<40
–36.0
3
× 10–12
<40
–36.5
4.8
× 10–10
–37.0
2.8
× 10–8
–38.0
1.3
× 10–5
–39.0
1.0
× 10–3
–39.2
1.9
× 10–3
–39.3
Loses Lock
APPLICATIONS
Low Cost 155 Mbps Fiber Optic Receiver
The AD807 and AD8015 can be used together for a complete
155 Mbps Fiber Optic Receiver (Quantizer and Clock Recovery,
and Transimpedance Amplifier) as shown in Figure 23.
The PIN diode front end is connected to a single mode 1300 nm
laser source. The PIN diode has 3.3 V reverse bias, 0.8 A/W re-
sponsively, 0.7 pF capacitance, and 2.5 GHz bandwidth.
The AD8015 outputs (POUT and NOUT) drive a differential, con-
stant impedance (50
Ω) low-pass filter with a 3 dB cutoff of
100 MHz. The outputs of the low-pass filter are ac coupled to
the AD807 inputs (PIN and NIN). The AD807 PLL damping
factor is set at 7 using a 0.22
µF capacitor.
Figure 24. Receiver Output (Data) Eye Diagram,
–7.0 dBm Optical Input
Figure 25. Receiver Output (Data) Eye Diagram,
–36.0 dBm Optical Input


同様の部品番号 - AD807A-155BRRL

メーカー部品番号データシート部品情報
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