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AD9200KSTRL データシート(PDF) 5 Page - Analog Devices

部品番号 AD9200KSTRL
部品情報  Complete 10-Bit, 20 MSPS, 80 mW CMOS A/D Converter
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD9200KSTRL データシート(HTML) 5 Page - Analog Devices

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AD9200
–5–
REV. E
PIN CONFIGURATIONS
PIN FUNCTION DESCRIPTIONS
SSOP
LQFP
Pin No.
Pin No.
Name
Description
1
44
AVSS
Analog Ground
2
45
DRVDD
Digital Driver Supply
3
1
D0
Bit 0, Least Significant Bit
4
2
D1
Bit 1
5
3
D2
Bit 2
6
4
D3
Bit 3
7
5
D4
Bit 4
8
8
D5
Bit 5
9
9
D6
Bit 6
10
10
D7
Bit 7
11
11
D8
Bit 8
12
12
D9
Bit 9, Most Significant Bit
13
16
OTR
Out-of-Range Indicator
14
17
DRVSS
Digital Ground
15
22
CLK
Clock Input
16
23
THREE-STATE
HI: High Impedance State. LO: Normal Operation
17
24
STBY
HI: Power-Down Mode. LO: Normal Operation
18
26
REFSENSE
Reference Select
19
27
CLAMP
HI: Enable Clamp Mode. LO: No Clamp
20
28
CLAMPIN
Clamp Reference Input
21
29
REFTS
Top Reference
22
30
REFTF
Top Reference Decoupling
23
32
MODE
Mode Select
24
34
REFBF
Bottom Reference Decoupling
25
35
REFBS
Bottom Reference
26
38
VREF
Internal Reference Output
27
39
AIN
Analog Input
28
42
AVDD
Analog Supply
28-Lead Shrink Small Outline (SSOP)
14
13
12
11
17
16
15
20
19
18
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
AD9200
AVSS
REFBS
VREF
AIN
AVDD
DRVDD
D0
D1
REFTF
MODE
REFBF
D2
D3
D4
D5
D6
D7
CLAMP
CLAMPIN
REFTS
D8
D9
OTR
DRVSS
REFSENSE
CLK
THREE-STATE
STBY
48-Lead Plastic Thin Quad Flatpack (LQFP)
36
35
34
33
32
31
30
29
28
27
26
25
13 14 15 16 17 18 19 20 21 22 23 24
1
2
3
4
5
6
7
8
9
10
11
12
48 47 46 45 44
39 38 37
43 42 41 40
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
NC
REFBS
REFBF
NC
MODE
NC
REFTF
D0
D1
D2
D3
D4
NC
NC
NC = NO CONNECT
D5
D6
D7
D8
REFTS
CLAMPIN
CLAMP
REFSENSE
AD9200
D9
NC


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