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ADM1024ARU データシート(PDF) 9 Page - Analog Devices |
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ADM1024ARU データシート(HTML) 9 Page - Analog Devices |
9 / 28 page ADM1024 –9– REV. 0 A read operation is then performed consisting of the serial bus address, R/ W bit set to 1, followed by the data byte read from the data register. This is shown in Figure 9c. 2. If the Address Pointer Register is known to be already at the desired address, data can be read from the corresponding data register without first writing to the Address Pointer Register, so Figure 9b can be omitted. NOTES 1. Although it is possible to read a data byte from a data register without first writing to the Address Pointer Register, if the Address Pointer Register is already at the correct value, it is not possible to write data to a register without writing to the Address Pointer Register because the first data byte of a write is always written to the Address Pointer Register. 2. In Figures 9a to 9c, the serial bus address is shown as the default value 01011(A1)(A0), where A1 and A0 are set by the three-state ADD pin. MEASUREMENT INPUTS The ADM1024 has nine external measurement pins that can be configured to perform various functions by programming the Channel Mode Register. R/W 0 SCL SDA 10 1 1 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 ACK. BY ADM1024 START BY MASTER 19 1 ACK. BY ADM1024 9 D7 D6 D5 D4 D3 D2 D1 D0 ACK. BY ADM1024 STOP BY MASTER 1 9 SCL (CONTINUED) SDA (CONTINUED) FRAME 1 SERIAL BUS ADDRESS BYTE FRAME 2 ADDRESS POINTER REGISTER BYTE FRAME 3 DATA BYTE Figure 9a. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register R/W 0 SCL SDA 1 0 1 1 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 ACK. BY ADM1024 START BY MASTER 19 1 ACK. BY ADM1024 9 FRAME 1 SERIAL BUS ADDRESS BYTE FRAME 2 ADDRESS POINTER REGISTER BYTE STOP BY MASTER Figure 9b. Writing to the Address Pointer Register Only R/ W 0 1 1 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 0 1 SCL SDA NO ACK. BY MASTER START BY MASTER 19 1 ACK. BY ADM1024 9 FRAME 1 SERIAL BUS ADDRESS BYTE FRAME 2 DATA BYTE FROM ADM1024 STOP BY MASTER Figure 9c. Reading Data from a Previously Selected Register Pins 13 and 14 are dedicated to temperature measurement, while Pins 15, 16, and 19 are dedicated analog input channels. Their function is unaffected by the Channel Mode Register. Pins 5 and 6 can be individually programmed as analog inputs, or as digital fan speed measurement inputs, by programming Bits 0 and 1 of the Channel Mode Register. Pins 17 and 18 can be configured as analog inputs or as inputs for external temperature-sensing diodes by programming Bit 2 of the Channel Mode Register. Bit 3 of the Channel Mode Register configures the internal VCC measurement range for either 3.3 V or 5 V. Bits 4 to 6 of the Channel Mode Register enable or disable Pins 22 to 24, when they are configured as interrupt inputs by setting Bit 7 of the Channel Mode Register. This function is controlled for Pins 20 and 21 by Bits 6 and 7 of Configuration Register 2. Bit 7 of the Channel Mode Register allows the processor core voltage ID bits (VID0 to VID4, Pins 24 to 20) to be reconfigured as interrupt inputs. A truth table for the Channel Mode Register is given in Table II. |
同様の部品番号 - ADM1024ARU |
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同様の説明 - ADM1024ARU |
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