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ADP1173AR-33 データシート(PDF) 11 Page - Analog Devices |
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ADP1173AR-33 データシート(HTML) 11 Page - Analog Devices |
11 / 16 page ADP1173 –11– REV. 0 The internal structure of the ILIM circuit is shown in Figure 21. Q1 is the ADP1173’s internal power switch, which is paralleled by sense transistor Q2. The relative sizes of Q1 and Q2 are scaled so that IQ2 is 0.5% of IQ1. Current flows to Q2 through an internal 80 Ω resistor and through the R LIM resistor. These two resistors parallel the base-emitter junction of the oscillator- disable transistor, Q3. When the voltage across R1 and RLIM exceeds 0.6 V, Q3 turns on and terminates the output pulse. If only the 80 Ω internal resistor is used (i.e., the I LIM pin is con- nected directly to VIN), the maximum switch current will be 1.5 A. Figures 4 and 5 gives RLIM values for lower current-limit values. OSCILLATOR VIN SW2 SW1 RLIM DRIVER 80 Ω (INTERNAL) ILIM (EXTERNAL) Q2 Q1 Q3 R1 Figure 21. Current Limit Operation The delay through the current limiting circuit is approximately 2 µs. If the switch ON time is reduced to less than 4 µs, accu- racy of the current trip-point is reduced. Attempting to program a switch ON time of 2 µs or less will produce spurious responses in the switch ON time. However, the ADP1173 will still provide a properly regulated output voltage. PROGRAMMING THE GAIN BLOCK The gain block of the ADP1173 can be used as a low-battery detector, error amplifier or linear post regulator. The gain block consists of an op amp with PNP inputs and an open-collector NPN output. The inverting input is internally connected to the ADP1173’s 1.245 V reference, while the noninverting input is available at the SET pin. The NPN output transistor will sink about 100 µA. 2 VIN +5V GND ADP1173 R1 AO SET 5 R2 100k Ω TO PROCESSOR 6 1.245V REF 7 VBAT VLB –1.245V 12.5µA VLB = BATTERY TRIP POINT R2 = 100k Ω R1 = Figure 22. Setting the Low Battery Detector Trip Point Figure 22 shows the gain block configured as a low battery monitor. Resistors R1 and R2 should be set to high values to reduce quiescent current, but not so high that bias current in the SET input causes large errors. A value of 100 k Ω for R2 is a good compromise. The value for R1 is then calculated from the formula: R1 = V LOBATT − 1.245 V 1.245 V R2 where VLOBATT is the desired low battery trip point. Since the gain block output is an open-collector NPN, a pull-up resistor should be connected to the positive logic power supply. 2 VIN 5V GND ADP1173 R1 AO SET 5 R2 47k Ω TO PROCESSOR 6 1.245mV REF 7 VBAT R3 1.6M Ω Figure 23. Adding Hysteresis to the Low Battery Detector |
同様の部品番号 - ADP1173AR-33 |
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同様の説明 - ADP1173AR-33 |
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