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ADP3153 データシート(PDF) 3 Page - Analog Devices

部品番号 ADP3153
部品情報  5-Bit Programmable Dual Power Supply Controller for Pentium II Processor
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ホームページ  http://www.analog.com
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ADP3153 データシート(HTML) 3 Page - Analog Devices

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ADP3153
–3–
REV. 0
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3153 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
PIN FUNCTION DESCRIPTIONS
Pin
Mnemonic
Function
1–4, 20
VID1–VID4,
Voltage Identification DAC Input Pins. These pins are internally pulled up to VREG providing a
VID0
logic high if left open. The DAC output range is 600 mV to 1.167 V. Leaving all five DAC
inputs open results in placing the ADP3153 into shutdown.
5
AGND
Analog Ground Pin. This pin must be routed separately to the (–) terminal of COUT.
6
SD
Shutdown Pin. A logic high will place the ADP3153 in shutdown and disable both outputs. This
pin is internally pulled down.
7
FB
This pin is the feedback connection for the linear controller. Connect this pin to the resistor
divider network to set the output voltage of the linear regulator.
8, 18
NC
No Connect.
9
VLDO
Gate Drive for the Linear Regulator N-channel MOSFET.
10
SENSE–
Connects to the internal resistor divider which along with the VID code, sets the output voltage.
Pin 10 is also the (–) input for the current comparator.
11
SENSE+
The (+) input for the current comparator. A threshold between Pins 10 and 11 set by the error
amplifier in conjunction with RSENSE, sets the current trip point.
12
CT
External Capacitor CT from Pin 12 to ground sets the off time of the device.
13
CMP
Error Amplifier Compensation Point. The current comparator threshold increases with the Pin
13 voltage.
14
PWRGD
Power Good Pin. An open drain signal to indicate that the output voltage is within a
±5% regu-
lation band.
15
VCC
Input Voltage Pin.
16
DRIVE2
Gate Drive for the Synchronous Rectifier N-channel MOSFET. The voltage at Pin 16 swings
from ground to VCC.
17
DRIVE1
Gate Drive for the buck switch N-channel MOSFET. The voltage at Pin 17 swings from ground
to VCC.
19
PGND
Driver Power Ground. Connects to the source of the bottom N-channel MOSFET onto the (–)
terminal of CIN.
PIN CONFIGURATION
20-Lead Thin Shrink Small Outline (TSSOP)
(RU-20)
TOP VIEW
(Not to Scale)
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
ADP3153
NC = NO CONNECT
SENSE–
VLDO
NC
VID2
VID3
VID4
FB
SD
AGND
SENSE+
CT
CMP
PGND
NC
DRIVE 1
PWRGD
VCC
DRIVE 2
VID1
VID0
ABSOLUTE MAXIMUM RATINGS*
Input Supply Voltage (Pin 15) . . . . . . . . . . . . –0.3 V to +16 V
Shutdown Input Voltage . . . . . . . . . . . . . . . . –0.3 V to +16 V
Power Dissipation . . . . . . . . . . . . . . . . . . . . Internally Limited
Operating Temperature Range . . . . . . . . . . . . . 0
°C to +70°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150
°C
θ
JA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
°C/W
Storage Temperature Range . . . . . . . . . . . . –65
°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300
°C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.
ORDERING GUIDE
Temperature
Package
Package
Model
Range
Description
Option
ADP3153ARU
0
°C to +70°C Thin Shrink Small RU-20
Outline (TSSOP)


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