ADV7196AKS datasheet(5/36 Pages) AD

部品番号	ADV7196AKS

部品情報	Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision

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REV. 0

–5–

ADV7196A

3.3 V TIMING–SPECIFICATIONS

Parameter

Min

Typ

Max

Unit

Conditions

MPU PORT

1

SCLOCK Frequency

0

400

kHz

SCLOCK High Pulsewidth, t1

0.6

µs

SCLOCK Low Pulsewidth, t2

1.3

µs

Hold Time (Start Condition), t3

0.6

µs

After This Period the 1st Clock Is Generated

Setup Time (Start Condition), t4

0.6

µs

Relevant for Repeated Start Condition

Data Setup Time, t5

100

ns

SDATA, SCLOCK Rise Time, t6

300

ns

SDATA, SCLOCK Fall Time, t7

300

ns

Setup Time (Stop Condition), t8

0.6

µs

Reset Low Time

100

ns

ANALOG OUTPUTS

Analog Output Delay

2

10

ns

Analog Output Skew

0.5

ns

CLOCK CONTROL AND PIXEL PORT

3

fCLK

27

MHz

Progressive Scan Mode

fCLK

74.25

MHz

HDTV Mode

fCLK

81

MHz

Async Timing Mode and

1

× Interpolation

Clock High Time t9

5.0

1.5

ns

Clock Low Time t10

5.0

2.0

ns

Data Setup Time t11

2.0

ns

Data Hold Time t12

4.5

ns

Control Setup Time t11

7.0

ns

Control Hold Time t12

4.0

ns

Pipeline Delay

16

Clock Cycles

For 4:4:4 Pixel Input Format at

1

× Oversampling

Pipeline Delay

29

Clock Cycles

For 4:4:4 or 4:2:2 Pixel Input Format at

2

×

Oversampling

NOTES

1Guaranteed by characterization.

2Output delay measured from 50% point of the rising edge of CLOCK to the 50% point of DAC output full-scale transition.

3Data: Cb/Cr [9–0], Cr [9–0], Y [9:0]

Control:

HSYNC/SYNC, VSYNC/TSYNC, DV

Specifications subject to change without notice.

(VAA = 3.15 V to 3.45 V, VREF = 1.235 V, RSET = 2470

, RLOAD = 300

. All specifications

TMIN to TMAX (0 C to 70 C) unless otherwise noted.)

同様の部品番号 - ADV7196AKS

メーカー	部品番号	データシート	部品情報
Analog Devices	ADV7196A	533Kb / 36P	Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision REV. 0

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同様の説明 - ADV7196AKS

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