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OP275GP データシート(PDF) 3 Page - Analog Devices |
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OP275GP データシート(HTML) 3 Page - Analog Devices |
3 / 12 page OP275 REV. A –3– Parameter Symbol Conditions Limit Units Offset Voltage VOS 1mV max Input Bias Current IB VCM = 0 V 350 nA max Input Offset Current IOS VCM = 0 V 50 nA max Input Voltage Range 1 VCM ±10.5 V min Common-Mode Rejection Ratio CMRR VCM = ±10.5 V 80 dB min Power Supply Rejection Ratio PSRR V = ±4.5 V to ±18 V 85 dB min Large Signal Voltage Gain AVO RL = 2 k Ω 250 V/mV min Output Voltage Range VO RL = 10 k Ω±13.5 V min Supply Current ISY VO = 0 V, RL = ∞ 5 mA max NOTES Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. 1Guaranteed by CMRR test. Specifications subject to change without notice. WAFER TEST LIMITS (@ V S = 15.0 V, TA = +25 C unless otherwise noted) ABSOLUTE MAXIMUM RATINGS 1 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V Input Voltage 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V Differential Input Voltage 2 . . . . . . . . . . . . . . . . . . . . . . . ±7.5 V Output Short-Circuit Duration to GND 3 . . . . . . . . . Indefinite Storage Temperature Range P, S Package . . . . . . . . . . . . . . . . . . . . . . . . –65 °C to +150°C Operating Temperature Range OP275G . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 °C to +85°C Junction Temperature Range P, S Package . . . . . . . . . . . . . . . . . . . . . . . . –65 °C to +150°C Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300 °C Package Type θ JA 4 θ JC Units 8-Pin Plastic DIP (P) 103 43 °C/W 8-Pin SOIC (S) 158 43 °C/W NOTES 1Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2For supply voltages greater than ±22 V, the absolute maximum input voltage is equal to the supply voltage. 3Shorts to either supply may destroy the device. See data sheet for full details. 4 θ JA is specified for the worst case conditions, i.e., θ JA is specified for device in socket for cerdip, P-DIP, and LCC packages; θ JA is specified for device soldered in circuit board for SOIC package. WARNING! ESD SENSITIVE DEVICE CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP275 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ORDERING GUIDE Model Temperature Range Package Option OP275GP –40 °C to +85°C 8-Pin Plastic DIP OP275GS –40 °C to +85°C 8-Pin SOIC OP275GSR –40 °C to +85°C SO-8 Reel, 2500 pcs. OP275GBC +25 °C DICE DICE CHARACTERISTICS Die Size 0.070 × 0.108 in. (7,560 sq. mils) Substrate is connected to V– |
同様の部品番号 - OP275GP |
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同様の説明 - OP275GP |
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