74ABT16652 datasheet(5/9 Pages) FAIRCHILD

部品番号	74ABT16652

部品情報	16-Bit Transceivers and Registers with 3-STATE Outputs

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DC Electrical Characteristics

(SSOP Package)

Note 5: Max number of outputs defined as (n). n

− 1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.

Note 6: Max number of outputs defined as (n). n

− 1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.

Note 7: Max number of data inputs (n) switching. n

− 1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (V

ILD), 0V to threshold (VIHD).

Guaranteed, but not tested.

AC Electrical Characteristics

(SSOP Package)

AC Operating Requirements

Symbol

Parameter

Min

Typ

Max

Units

VCC

Conditions

CL = 50 pF, RL = 500Ω

VOLP

Quiet Output Maximum Dynamic VOL

0.7

1.2

V

5.0

TA = 25°C (Note 5)

VOLV

Quiet Output Minimum Dynamic VOL

−1.4

−1.0

V

5.0

TA = 25°C (Note 5)

VOHV

Minimum HIGH Level Dynamic Output Voltage

2.5

3.0

V

5.0

TA = 25° (Note 6)

VIHD

Minimum HIGH Level Dynamic Input Voltage

2.0

1.6

V

5.0

TA = 25°C (Note 7)

VILD

Maximum LOW Level Dynamic Input Voltage

1.2

0.8

V

5.0

TA = 25°C (Note 7)

Symbol

Parameter

TA = +25°C

TA = −40°C to +85°C

Units

VCC = +5.0V

VCC = 4.5V–5.5V

CL = 50 pF

Min

Typ

Max

Min

Max

tPLH

Propagation Delay

1.5

3.0

4.9

1.5

4.9

ns

tPHL

Clock to Bus

1.5

3.4

4.9

1.5

4.9

tPLH

Propagation Delay

1.5

2.6

4.5

1.5

4.5

ns

tPHL

Bus to Bus

1.5

3.0

4.5

1.5

4.5

tPLH

Propagation Delay

1.5

2.9

5.0

1.5

5.0

ns

tPHL

SBAn or SABn

1.5

3.2

5.0

1.5

5.0

to An to Bn

tPZH

Enable Time

1.5

2.8

5.5

1.5

5.5

ns

tPZL

OEBAn or OEABn

1.5

3.0

5.5

1.5

5.5

to An or Bn

tPHZ

Disable Time

1.5

3.9

5.9

1.5

5.9

ns

tPLZ

OEBAn or OEABn

1.5

3.3

5.9

1.5

5.9

to An or Bn

Symbol

Parameter

TA = +25°CTA = −40°C to +85°C

Units

VCC = +5.0V

VCC = 4.5V–5.5V

CL = 50 pF

Min

Typ

Max

Min

Max

fmax

Max Clock Frequency

200

MHz

tS(H)

Setup Time, HIGH

2.0

ns

tS(L)

or LOW Bus to Clock

tH(H)

Hold Time, HIGH

1.0

ns

tH(L)

or LOW Bus to Clock

tW(H)

Pulse Width,

3.0

ns

tW(L)

HIGH or LOW

同様の部品番号 - 74ABT16652

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