April 1993

Revised January 1999

© 1999 Fairchild Semiconductor Corporation

DS011599.prf

www.fairchildsemi.com

74ABT16652

16-Bit Transceivers and Registers with 3-STATE Outputs

General Description

The ABT16652 consists of sixteen bus transceiver circuits

with D-type flip-flops, and control circuitry arranged for mul-

tiplexed transmission of data directly from the input bus or

from the internal registers. Each byte has separate control

inputs which can be shorted together for full 16-bit opera-

tion. Data on the A or B bus will be clocked into the regis-

ters as the appropriate clock pin goes to HIGH logic level.

Output Enable pins (OEAB, OEBA) are provided to control

the transceiver function.

Features

s Independent registers for A and B buses

s Multiplexed real-time and stored data

s Separate control logic for each byte

s A and B output sink capability of 64 mA, source

capability of 32 mA

s Guaranteed output skew

s High impedance glitch free bus loading during entire

power up and power down cycle

s Nondestructive hot insertion capability

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Pin Descriptions

Connection Diagram

Order Number

Package Number

Package Description

74ABT16652CSSC

MS56A

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide

74ABT16652CMTD

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Pin Names

Descriptions

Data Register A Inputs/

3-STATE Outputs

Data Register B Inputs/

3-STATE Outputs

Clock Pulse Inputs

Select Inputs

Output Enable Inputs