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74AC240 データシート(PDF) 1 Page - Fairchild Semiconductor |
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74AC240 データシート(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page © 1999 Fairchild Semiconductor Corporation DS009941 www.fairchildsemi.com November 1988 Revised November 1999 74AC240 • 74ACT240 Octal Buffer/Line Driver with 3-STATE Outputs General Description The AC/ACT240 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. Features s ICC and IOZ reduced by 50% s Inverting 3-STATE outputs drive bus lines or buffer memory address registers s Outputs source/sink 24 mA s ACT240 has TTL-compatible inputs Ordering Code: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC Connection Diagram Pin Descriptions Truth Tables H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance FACT is a trademark of Fairchild Semiconductor Corporation. Order Number Package Number Package Description 74AC240SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 74AC240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74AC240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,4.4mm Wide 74AC240PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 74ACT240SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 74ACT240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACT240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,4.4mm Wide 74ACT240PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Pin Names Description OE1, OE2 3-STATE Output Enable Inputs I0–I7 Inputs O0–O7 Outputs Inputs Outputs OE1 In (Pins 12, 14, 16, 18) LL H LH L HX Z Inputs Outputs OE2 In (Pins 3, 5, 7, 9) LL H LH L HX Z |
同様の部品番号 - 74AC240 |
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同様の説明 - 74AC240 |
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