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74ACT16240 データシート(PDF) 1 Page - Fairchild Semiconductor |
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74ACT16240 データシート(HTML) 1 Page - Fairchild Semiconductor |
1 / 7 page © 1999 Fairchild Semiconductor Corporation DS500293 www.fairchildsemi.com August 1999 Revised October 1999 74ACT16240 16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs General Description The ACT16240 contains sixteen inverting buffers with 3- STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/ receiver. The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. Features s Separate control logic for each byte s 16-bit version of the ACT240 s Outputs source/sink 24 mA s TTL-compatible inputs Ordering Code: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Connection Diagram FACT ™ is a trademark of Fairchild Semiconductor Corporation. Order Number Package Number Package Description 74ACT16240SSC MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 74ACT16240MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Pin Names Description OEn Output Enable Inputs (Active LOW) I0–I15 Inputs O0–O15 Outputs |
同様の部品番号 - 74ACT16240 |
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同様の説明 - 74ACT16240 |
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