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AD5260BRUZ20 データシート(PDF) 7 Page - Analog Devices |
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AD5260BRUZ20 データシート(HTML) 7 Page - Analog Devices |
7 / 24 page AD5260/AD5262 Rev. A | Page 7 of 24 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS AD5260 NC = NO CONNECT 1 2 3 4 5 6 7 W B VDD SDI CLK SHDN A 14 13 12 11 10 9 8 NC VL VSS CS PR GND SDO TOP VIEW (Not to Scale) Figure 7. AD5260 Pin Configuration Table 5. AD5260 Pin Function Descriptions Pin No. Mnemonic Description 1 A A Terminal. 2 W Wiper Terminal. 3 B B Terminal. 4 VDD Positive Power Supply. Specified for operation at both 5 V or 15 V (sum of |VDD| + |VSS| ≤ 15 V). 5 SHDN Active Low Input. Terminal A, open-circuit. Shutdown controls variable resistor. 6 CLK Serial Clock Input, Positive Edge Triggered. 7 SDI Serial Data Input. 8 CS Chip Select Input, Active Low. When CS returns high, data is loaded into the RDAC register. 9 PR Active Low Preset to Midscale. Sets RDAC registers to 0x80. 10 GND Ground. 11 VSS Negative Power Supply. Specified for operation from 0 V to −5 V. 12 VL Logic Supply Voltage. Needs to be the same voltage as the digital logic controlling the AD5260. 13 NC No Connect. Users should not connect anything other than a dummy pad on this pin. 14 SDO Serial Data Output. Open-drain transistor requires a pull-up resistor. |
同様の部品番号 - AD5260BRUZ20 |
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同様の説明 - AD5260BRUZ20 |
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