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74LVT16240MTDX データシート(PDF) 2 Page - Fairchild Semiconductor

部品番号 74LVT16240MTDX
部品情報  Low Voltage 16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs
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メーカー  FAIRCHILD [Fairchild Semiconductor]
ホームページ  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74LVT16240MTDX データシート(HTML) 2 Page - Fairchild Semiconductor

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Connection Diagram
Pin Descriptions
Truth Table
H
HIGH Voltage Level
L
LOW Voltage Level
X
Immaterial
Z
High Impedance
Functional Description
The LVT16240 and LVTH16240 contain sixteen inverting buffers with 3-STATE standard outputs. The device is nibble
(4-bits) controlled with each nibble functioning identically, but independent of the other. The control pins may be shorted
together to obtain full 16-bit operation. The 3-STATE outputs are controlled by an Output Enable (OEn) input for each nib-
ble. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode,
but this does not interfere with entering new data into the inputs.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Pin Names
Description
OEn
Output Enable Inputs (Active LOW)
I0–I15
Inputs
O0–O15
3-STATE Outputs
Inputs
Outputs
OE1
I0–I3
O0–O3
LL
H
LH
L
HX
Z
Inputs
Outputs
OE2
I4–I7
O4–O7
LL
H
LH
L
HX
Z
Inputs
Outputs
OE3
I8–I11
O8–O11
LL
H
LH
L
HX
Z
Inputs
Outputs
OE4
I12–I15
O12–O15
LL
H
LH
L
HX
Z


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