© 2005 Fairchild Semiconductor Corporation

DS500100

www.fairchildsemi.com

July 1999

Revised March 2005

74LVTH273

Low Voltage Octal D-Type Flip-Flop with Clear

General Description

The LVTH273 is a high-speed, low-power positive-edge-

triggered octal D-type flip-flop featuring separate D-type

inputs for each flip-flop. A buffered Clock (CP) and Clear

(CLR) are common to all flip-flops.

The state of each D-type input, one setup time before the

positive clock transition, is transferred to the corresponding

flip-flop’s output.

The LVTH273 data inputs include bushold, eliminating the

need for external pull-up resistors to hold unused inputs.

These octal flip-flops are designed for low-voltage (3.3V)

interface to a 5V environment. The LVTH273 is fabricated

with an advanced BiCMOS technology to achieve high

speed operation similar to 5V ABT while maintaining low

power dissipation.

Features

s Input and output interface capability to systems at

s Bushold on the data inputs eliminate the need for

external pull-up resistors to hold unused inputs

s Outputs source/sink

32 mA/64 mA

s Functionally compatible with the 74 series 273

s Latch-up performance exceeds 500 mA

s ESD performance:

Human-body model

! 2000V

Machine model

! 200V

Charged-device model

! 1000V

Ordering Code:

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

Logic Symbols

IEEE/IEC

Order Number

Package

Package Description

Number

74LVTH273WM

M20B

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74LVTH273SJ

M20D

Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LVTH273MTC

MTC20

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74LVTH273MTCX_NL

(Note 1)

MTC20

Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide