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74LVX174M データシート(PDF) 1 Page - Fairchild Semiconductor |
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74LVX174M データシート(HTML) 1 Page - Fairchild Semiconductor |
1 / 7 page © 2003 Fairchild Semiconductor Corporation DS011607 www.fairchildsemi.com May 1993 Revised October 2003 74LVX174 Low Voltage Hex D-Type Flip-Flop with Master Reset General Description The LVX174 is a high-speed hex D flip-flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the D inputs is transferred to storage during the LOW-to-HIGH clock transition. The device has a Master Reset to simultaneously clear all flip-flops. Features s Input voltage level translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC Connection Diagram Pin Descriptions Order Number Package Number Package Description 74LVX174M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVX174SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX174MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pin Names Description D0–D5 Data Inputs CP Clock Pulse Input MR Master Reset Input Q0–Q5 Outputs |
同様の部品番号 - 74LVX174M |
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同様の説明 - 74LVX174M |
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