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74LVX244M データシート(PDF) 1 Page - Fairchild Semiconductor |
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74LVX244M データシート(HTML) 1 Page - Fairchild Semiconductor |
1 / 6 page © 2005 Fairchild Semiconductor Corporation DS011552 www.fairchildsemi.com February 1993 Revised April 2005 74LVX244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs General Description The LVX244 is an octal non-inverting buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. The inputs tolerate up to 7V allowing interface of 5V systems to 3V systems. Features s Input voltage translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Logic Symbol IEEE/IEC Connection Diagram Pin Descriptions Truth Tables H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance Order Number Package Number Package Description 74LVX244M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74LVX244SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pin Names Description OE1, OE2 3-STATE Output Enable Inputs I0–I7 Inputs O0–O7 Outputs Inputs Outputs OE1 In (Pins 12, 14, 16, 18) LL L LH H HX Z Inputs Outputs OE2 In (Pins 3, 5, 7, 9) LL L LH H HX Z |
同様の部品番号 - 74LVX244M |
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同様の説明 - 74LVX244M |
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