データシートサーチシステム |
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74VCX16374MTD データシート(PDF) 3 Page - Fairchild Semiconductor |
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74VCX16374MTD データシート(HTML) 3 Page - Fairchild Semiconductor |
3 / 10 page 3 www.fairchildsemi.com Functional Description The 74VCX16374 consists of sixteen edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The device is byte controlled with each byte func- tioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. Each clock has a buffered clock and buffered Output Enable common to all flip-flops within that byte. The description which follows applies to each byte. Each flip-flop will store the state of their individual I inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CPn) transition. With the Output Enable (OEn) LOW, the contents of the flip-flops are avail- able at the outputs. When OEn is HIGH, the outputs go to the high impedance state. Operations of the OEn input does not affect the state of the flip-flops. Logic Diagram Byte 1 (0:7) Byte 2 (8:15) Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. |
同様の部品番号 - 74VCX16374MTD |
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同様の説明 - 74VCX16374MTD |
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