データシートサーチシステム |
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74VCX16722 データシート(PDF) 2 Page - Fairchild Semiconductor |
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74VCX16722 データシート(HTML) 2 Page - Fairchild Semiconductor |
2 / 8 page www.fairchildsemi.com 2 Connection Diagram Pin Descriptions Truth Table H = HIGH Voltage Level L = LOW Level Voltage X = Immaterial (HIGH or LOW, Inputs may not float) Z = High Impedance O0 = Previous O0 before LOW-to-HIGH transition of Clock = LOW-to-HIGH transition Functional Description The VCX16722 contains twenty-two D-type flip-flops with 3-STATE standard outputs. The twenty-two flip-flops will store the state of their individual D-type inputs that meet the setup and hold time requirements on the LOW-HIGH Clock (CLK) transition, when the Clock-Enable (CE) is LOW. The 3-STATE standard outputs are controlled by the Output-Enable (OE). When OE is HIGH, the standard out- puts are in high impedance mode but this does not inter- fere with entering new data into the flip-flops. Logic Diagram Pin Names Description OE Output Enable Input (Active LOW) CE Clock Enable Input (Active Low) CLK Clock Input D1 - D21 Data Inputs O1 - O21 3-STATE Outputs CLK CE OE D0-D21 O0-O21 XX H X Z XH L X O0 LLL L LL H H L or H L L X O0 |
同様の部品番号 - 74VCX16722 |
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同様の説明 - 74VCX16722 |
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