DAC1653Q datasheet(9/101 Pages) IDT

部品番号	DAC1653Q

部品情報	Quad 16-bit DAC: 10 Gbps JESD204B interface: up to 1.50

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メーカー	IDT [Integrated Device Technology]

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9 / 101 page

DAC1653Q/DAC1658Q

Advance data sheet

Rev. 1.03 — 13 May 2013

9 of 101

Integrated Device Technology

DAC1653Q/DAC1658Q

Quad 16-bit DAC: 10 Gbps JESD204B interface; up to 1.50 Gsps

9. Static characteristics

9.1 Common characteristics

Table 5.

Characteristics

VDDA(1V2) = 1.2 V; VDDD(1V2) = 1.2 V; Typical values measured at Tamb = +25 C; RL = 50  ; IO(fs) = 20 mA; maximum sample

rate used; external PLL; no inverse (sinus x) / x; no output correction; output level = 1 V (p-p); unless otherwise specified.

Symbol

Parameter

Conditions

Test[1]

Min

Typ

Max

Unit

VDDA

analog supply

voltage (3.3 V)

DAC1658Q: 3.3 V

C

3.15

3.3

3.45

V

DAC1653Q: 2.5 V or

3.3 V

C

2.38

2.5 or 3.3

3.45

V

VDDD(1V2)

digital supply

voltage (1.2 V)

C

1.14

1.2

1.26

V

VDDA(1V2)

analog supply

voltage (1.2 V

C

1.1

1.2

1.3

V

VDDD(IO)

I/O digital

supply voltage

1.2 V or 1.8 V for IOs

and SPI signals

C

1.14

1.2

2.1

V

C

1.14

1.8

2.1

V

VDDD(SO)

differential

digital supply

voltage

C

1.14

1.2

2.1

V

C

1.14

1.8

2.1

V

Clock inputs (pins CLKIN_P, CLKIN_N)

Vi

input voltage

|Vgpd| < 50 mV

C

[2] 825

-

<tbd>

mV

Vidth

input differential

threshold

voltage

|Vgpd| < 50 mV

C

[2]

100

-

+100

mV

Ri

input resistance

D

-

100

-



Ci

input

capacitance

D

-

<tbd>

-

pF

Digital inputs/outputs (SYSREF_W_P/SYSREF_W_N, SYSREF_E_P/SYSREF_E_N)

Vi

input voltage

|Vgpd| < 50 mV

C

[2] 825

-

<tbd>

mV

Vidth

input differential

threshold

voltage

|Vgpd| < 50 mV

C

[2]

100

-

+100

mV

Ri

input resistance

D

-

100

-



Ci

input

capacitance

D

-

<tbd>

-

pF

Digital inputs (pins SDO, SDIO, SCLK, SCS_N, RESET_N, IO0, IO1, IO2, IO3)

VIL

LOW-level input

voltage

C

GND

-

0.3VDDD(IO)

V

VIH

HIGH-level

input voltage

C

0.7VDDD(IO)

-VDDD(IO)

V

Digital inputs (VINx_P/VINx_N) following the LV-OIF-11G-SR; CML format

Vcm

common-mode

voltage

AC coupling is

mandatory; controlled

by SPI register

C

0.580

-

1.126

V

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