August 1993

Revised April 1999

© 1999 Fairchild Semiconductor Corporation

DS011640.prf

www.fairchildsemi.com

74VHC595

8-Bit Shift Register with Output Latches

General Description

The VHC595 is an advanced high-speed CMOS Shift Reg-

ister fabricated with silicon gate CMOS technology. It

achieves the high-speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low

power dissipation.

This device contains an 8-bit serial-in, parallel-out shift reg-

ister that feeds an 8-bit D-type storage register. The stor-

age register has eight 3-STATE outputs. Separate clocks

are provided for both the shift register and the storage reg-

ister. The shift register has a direct-overriding clear, serial

input, and serial output (standard) pins for cascading. Both

the shift register and storage register use positive-edge

triggered clocks. If both clocks are connected together, the

shift register state will always be one clock pulse ahead of

the storage register.

An input protection circuit insures that 0V to 7V can be

applied to the input pins without regard to the supply volt-

age. This device can be used to interface 5V to 3V systems

and two supply systems such as battery backup. This cir-

cuit prevents device destruction due to mismatched supply

and input voltages.

Features

s Power down protection is provided on all inputs

s Pin and function compatible with 74HC595

Ordering Code:

Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

IEEE/IEC

Connection Diagram

Order Number

Package Number

Package Description

74VHC595M

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

74VHC595SJ

M16D

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74VHC595MTC

MTC16

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74VHC595N

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide