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6

Applications

Two CD4512 8-channel data selectors are used here with

the CD4514B 4-bit latch/decoder to effect a complex data

routing system. A total of 16 inputs from data registers are

selected and transferred via a 3-STATE data bus to a data

distributor for rearrangement and entry into 16 output regis-

ters. In this way sequential data can be re-routed or inter-

mixed according to patterns determined by data select and

distribution inputs.

Data is placed into the routing scheme via the 8 inputs on

both CD4512 data selectors. One register is assigned to

each input. The signals on A0, A1 and A2 choose 1-of-8

inputs for transfer out to the 3-STATE data bus. A fourth

signal, labelled Dis, disables one of the CD4512 selectors,

assuring transfer of data from only one register.

In addition to a choice of input registers, 1–16, the rate of

transfer of the sequential information can also be varied.

That is, if the CD4512 were addressed at a rate that is 8

times faster than the shift frequency of the input registers,

the most significant bit (MSB) from each register could be

selected for transfer to the data bus. Therefore, all of the

most significant bits from all of the registers can be trans-

ferred to the data bus before the next most significant bit is

presented for transfer by the input registers.

Information from the 3-STATE bus is redistributed by the

CD4514B 4-bit latch/decoder. Using the 4-bit address,

INA–IND, the information on the inhibit line can be trans-

ferred to the addressed output line to the desired output

registers, A–P. This distribution of data bits to the output

registers can be made in many complex patterns. For

example, all of the most significant bits from the input regis-

ters can be routed into output register A, all of the next

most significant bits into register B, etc. In this way horizon-

tal, vertical, or other methods of data slicing can be imple-

mented.