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DM74ALS540ASJ データシート(PDF) 1 Page - Fairchild Semiconductor

部品番号 DM74ALS540ASJ
部品情報  Octal Inverting Buffer and Line Driver with 3-STATE Outputs
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メーカー  FAIRCHILD [Fairchild Semiconductor]
ホームページ  http://www.fairchildsemi.com
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DM74ALS540ASJ データシート(HTML) 1 Page - Fairchild Semiconductor

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© 2000 Fairchild Semiconductor Corporation
DS009170
www.fairchildsemi.com
October 1986
Revised February 2000
DM74ALS540A
Octal Inverting Buffer and Line Driver
with 3-STATE Outputs
General Description
This octal buffer and line driver is designed to have the per-
formance of the DM74ALS240A series and, at the same
time, offer a pinout with inputs and outputs on opposite
sides of the package. This arrangement greatly enhances
printed circuit board layout. The 3-STATE control gate is a
2-input NOR such that if either G1 or G2 is HIGH, all eight
outputs are in the high impedance state.
Features
s Advanced oxide-isolated, ion-implanted Schottky TTL
process
s Switching performance is guaranteed over full tempera-
ture and VCC supply range
s Data flow-thru pinout (All inputs on opposite side from
outputs)
s P-N-P inputs reduce DC loading
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
H
= HIGH Logic Level
L
= LOW Logic Level
X
= Don't Care (Either HIGH or LOW Logic Level)
Hi-Z
= High Impedance (OFF) State
Order Number
Package Number Package Description
DM74ALS540AWM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74ALS540ASJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74ALS540AN
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
Output
G 1G 2A
Y
H
X
X
Hi-Z
X
H
X
Hi-Z
LLL
H
LL
H
L


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