データシートサーチシステム |
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DM74LS123SJX データシート(PDF) 3 Page - Fairchild Semiconductor |
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DM74LS123SJX データシート(HTML) 3 Page - Fairchild Semiconductor |
3 / 8 page 3 www.fairchildsemi.com Operating Rules (Continued) 8. Output pulse width variation versus VCC and tempera- tures: Figure 6 depicts the relationship between pulse width variation versus VCC, and Figure 7 depicts pulse width variation versus temperatures. FIGURE 6. FIGURE 7. 9. Under any operating condition CX and RX must be kept as close to the one-shot device pins as possible to min- imize stray capacitance, to reduce noise pick-up, and to reduce I-R and Ldi/dt voltage developed along their connecting paths. If the lead length from CX to pins (6) and (7) or pins (14) and (15) is greater than 3 cm, for example, the output pulse width might be quite different from values predicted from the appropriate equations. A non-inductive and low capacitive path is necessary to ensure complete discharge of CX in each cycle of its operation so that the output pulse width will be accu- rate. 10. The CEXT pins of this device are internally connected to the internal ground. For optimum system performance they should be hard wired to the system’s return ground plane. 11. VCC and ground wiring should conform to good high- frequency standards and practices so that switching transients on the VCC and ground return leads do not cause interaction between one-shots. A 0.01 µF to 0.10 µF bypass capacitor (disk ceramic or monolithic type) from VCC to ground is necessary on each device. Fur- thermore, the bypass capacitor should be located as close to the VCC-pin as space permits. Note: For further detailed device characteristics and output per- formance please refer to the Fairchild Semiconductor one-shot application note AN-372. |
同様の部品番号 - DM74LS123SJX |
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同様の説明 - DM74LS123SJX |
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