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FAN5234 データシート(PDF) 11 Page - Fairchild Semiconductor |
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FAN5234 データシート(HTML) 11 Page - Fairchild Semiconductor |
11 / 15 page FAN5234 PRODUCT SPECIFICATION REV. 1.0.10 5/3/04 11 Assuming switching losses are about the same for both the rising edge and falling edge, Q1's switching losses, occur during the shaded time when the MOSFET has voltage across it and current through it. These losses are given by: PUPPER = PSW + PCOND where: P UPPER is the upper MOSFET's total losses, and P SW and PCOND are the switching and conduction losses for a given MOSFET. RDS(ON) is at the maximum junction temperature (TJ). tS is the switching period (rise or fall time) and is t2+t3 (Figure 8). The driver’s impedance and CISS determine t2 while t3’s period is controlled by the driver's impedance and QGD. Since most of tS occurs when VGS = VSP we can use a constant current assumption for the driver to simplify the calculation of tS: Figure 8. Switching losses and Q G Figure 9. Drive Equivalent Circuitt Most MOSFET vendors specify QGD and QGS. QG(SW) can be determined as: QG(SW) = QGD + QGS – QTH where QTH is the gate charge required to get the MOSFET to it's threshold (VTH). For the high-side MOSFET, VDS = VIN, which can be as high as 20V in a typical portable application. Care should also be taken to include the delivery of the MOSFET's gate power (PGATE ) in calculating the power dissipation required for the FAN5234: PGATE = QG × VCC × FSW (17) where QG is the total gate charge to reach VCC. Low-Side Losses Q2, however, switches on or off with its parallel shottky diode conducting, therefore VDS ≈ 0.5V. Since PSW is pro- portional to VDS , Q2's switching losses are negligible and we can select Q2 based on RDS(ON) only. Conduction losses for Q2 are given by:: where RDS(ON) is the RDS(ON) of the MOSFET at the highest operating junction temperature and is the minimum duty cycle for the converter. Since DMIN < 20% for portable computers, (1-D) ≈ 1 produces a conservative result, further simplifying the calculation. The maximum power dissipation (P D(MAX)) is a function of the maximum allowable die temperature of the low-side MOSFET, the θJ-A, and the maximum allowable ambient temperature rise: θJ-A, depends primarily on the amount of PCB area that can be devoted to heat sinking (see FSC app note AN-1029 for SO-8 MOSFET thermal information). P SW V DS I L × 2 ---------------------- 2 × t S × F SW = (15a) P COND V OUT V IN -------------- I OUT 2 × R DS ON () × = (15b) V SP t1 t2 t3 4.5V t4 t5 Q G(SW) V DS I D Q GS Q GD V TH V GS C ISS C RSS C ISS C ISS = CGS || CGD C GD R D R GATE C GS HDRV 5V SW VIN G t S Q GSW () I DRIVER --------------------- Q GSW () VCC V SP – R DRIVER R GATE + ----------------------------------------------- ----------------------------------------------------- ≈ = (16) P COND 1D – () I OUT 2 × R DS ON () × = (18) D V OUT V IN -------------- = P D MAX () T J MAX () TA MAX () – θ JA – -------------------------------------------------- = (19) |
同様の部品番号 - FAN5234 |
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同様の説明 - FAN5234 |
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