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FDC633N データシート(PDF) 4 Page - Fairchild Semiconductor |
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FDC633N データシート(HTML) 4 Page - Fairchild Semiconductor |
4 / 4 page FDC633N Rev.C Figure 10. Single Pulse Maximum Power Dissipation. 0.1 0.3 1 3 10 30 20 50 100 300 600 1300 V , DRAIN TO SOURCE VOLTAGE (V) DS Ciss f = 1 MHz V = 0 V GS Coss Crss Figure 8. Capacitance Characteristics. Figure 7. Gate Charge Characteristics. Figure 9. Maximum Safe Operating Area. Typical Electrical Characteristics (continued) 0 3 6 9 12 15 0 1 2 3 4 5 Q , GATE CHARGE (nC) g V = 5V DS 10V I = 5.2A D 15V 0.1 0.2 0.5 1 2 5 10 30 50 0.01 0.05 0.1 0.5 1 2 5 10 20 40 V , DRAIN-SOURCE VOLTAGE (V) RDS(ON) LIMIT A DC DS 1s 100ms 10ms 1ms V = 4.5V SINGLE PULSE R = See Note 1b T = 25°C θJA GS A 100us 0.01 0.1 1 10 100 300 0 1 2 3 4 5 SINGLE PULSE TIME (SEC) SINGLE PULSE R =See note 1b T = 25°C θJA A 0.00001 0.0001 0.001 0.01 0.1 1 10 100 300 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , TIME (sec) 1 Single Pulse D = 0.5 0.1 0.05 0.02 0.01 0.2 Duty Cycle, D = t / t 1 2 R (t) = r(t) * R R = See Note 1b T - T = P * R (t) A J P(pk) t1 t 2 θJA θJA θJA θJA Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in note 1b. Transient thermal response will change depending on the circuit board design. |
同様の部品番号 - FDC633N |
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同様の説明 - FDC633N |
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