データシートサーチシステム |
|
AD7923BRUZ-REEL7 データシート(PDF) 3 Page - Analog Devices |
|
AD7923BRUZ-REEL7 データシート(HTML) 3 Page - Analog Devices |
3 / 24 page AD7923 Rev. C | Page 3 of 24 SPECIFICATIONS AVDD = VDRIVE = 2.7 V to 5.25 V, REFIN = 2.5 V, fSCLK = 20 MHz, TA = TMIN to TMAX, unless otherwise noted. Table 1. Parameter B Version1 Unit Test Conditions/Comments DYNAMIC PERFORMANCE fIN = 50 kHz sine wave, fSCLK = 20 MHz Signal-to-(Noise + Distortion) (SINAD)2 70 dB min @ 5 V, –40°C to +85°C 69 dB min @ 5 V, 85°C to 125°C, typ 70 dB 69 dB min @ 3 V typ 70 dB, –40°C to +125°C Signal-to-Noise (SNR)2 70 dB min Total Harmonic Distortion (THD)2 −77 dB max @ 5 V typ, −84 dB −73 dB max @ 3 V typ,−77 dB Peak Harmonic or Spurious Noise −78 dB max @ 5 V typ, −86 dB (SFDR)2 −76 dB max @ 3 V typ, −80 dB Intermodulation Distortion (IMD)2 fA = 40.1 kHz, fB = 41.5 kHz Second Order Terms −90 dB typ Third Order Terms −90 dB typ Aperture Delay 10 ns typ Aperture Jitter 50 ps typ Channel-to-Channel Isolation −85 dB typ fIN = 400 kHz Full Power Bandwidth 8.2 MHz typ @ 3 dB 1.6 MHz typ @ 0.1 dB DC ACCURACY2 Resolution 12 Bits Integral Nonlinearity ±1 LSB max Differential Nonlinearity −0.9/+1.5 LSB max Guaranteed no missed codes to 12 bits 0 V to REFIN Input Range Straight binary output coding Offset Error ±8 LSB max Typ ±0.5 LSB Offset Error Match ±0.5 LSB max Gain Error ±1.5 LSB max Gain Error Match ±0.5 LSB max 0 V to 2 × REFIN Input Range −REFIN to +REFIN biased about REFIN with twos complement output coding Positive Gain Error ±1.5 LSB max Positive Gain Error Match ±0.5 LSB max Zero-Code Error ±8 LSB max Typ ±0.8 LSB Zero-Code Error Match ±0.5 LSB max Negative Gain Error ±1 LSB max Negative Gain Error Match ±0.5 LSB max ANALOG INPUT Input Voltage Range 0 to REFIN V Range bit set to 1 0 to 2 × REFIN V Range bit set to 0, AVDD = 4.75 V to 5.25 V DC Leakage Current ±1 μA max Input Capacitance 20 pF typ REFERENCE INPUT REFIN Input Voltage 2.5 V ±1% specified performance DC Leakage Current ±1 μA max REFIN Input Impedance 36 kΩ typ fSAMPLE = 200 kSPS LOGIC INPUTS Input High Voltage, VINH 0.7 × VDRIVE V min Input Low Voltage, VINL 0.3 × VDRIVE V max Input Current, IIN ±1 μA max Typ 10 nA, VIN = 0 V or VDRIVE Input Capacitance, CIN3 10 pF max |
同様の部品番号 - AD7923BRUZ-REEL7 |
|
同様の説明 - AD7923BRUZ-REEL7 |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |