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FM28V102 データシート(PDF) 2 Page - Cypress Semiconductor

部品番号 FM28V102
部品情報  1Mbit (64Kx16)F-RAM Memory
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メーカー  CYPRESS [Cypress Semiconductor]
ホームページ  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

FM28V102 データシート(HTML) 2 Page - Cypress Semiconductor

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FM28V102 - 64Kx16 F-RAM
Document Number: 001-86601 Rev. **
Page 2 of 16
CE1, CE2
Control
Logic
WE
A(15:2)
A(1:0)
I/O Latch & Bus Driver
OE
DQ(15:0)
16K x 64
F-RAM Array
A(15:0)
Column Decoder
. . .
UB, LB
2
ZZ
Figure 1. Block Diagram
PIN DESCRIPTION
Pin Name
Type
Pin Description
A(15:0)
Input
Address inputs: The 16 address lines select one of 64K words in the F-RAM array. The lowest
two address lines A(1:0) may be used for page mode read and write operations.
/CE
Input
Chip Enable inputs: The device is selected and a new memory access begins on the falling
edge of /CE. The entire address is latched internally at this point. Subsequent changes to the
A(1:0) address inputs allow page mode operation.
/WE
Input
Write Enable: A write cycle begins when /WE is asserted. The rising edge causes the
FM28V102 to write the data on the DQ bus to the F-RAM array. The falling edge of /WE
latches a new column address for page mode write cycles.
/OE
Input
Output Enable: When /OE is low, the FM28V102 drives the data bus when valid read data is
available. Deasserting /OE high tri-states the DQ pins.
/ZZ
Input
Sleep: When /ZZ is low, the device enters a low power sleep mode for the lowest supply
current condition. Since this input is logically AND’d with /CE, /ZZ must be high for normal
read/write operation. The /ZZ pin is internally pulled up.
DQ(15:0)
I/O
Data: 16-bit bi-directional data bus for accessing the F-RAM array.
/UB
Input
Upper Byte Select: Enables DQ(15:8) pins during reads and writes. These pins are hi-Z if /UB
is high. If the user does not perform byte writes and the device is not configured as a 128Kx8,
the /UB and /LB pins may be tied to ground.
/LB
Input
Lower Byte Select: Enables DQ(7:0) pins during reads and writes. These pins are hi-Z if /LB
is high. If the user does not perform byte writes and the device is not configured as a 128Kx8,
the /UB and /LB pins may be tied to ground.
VDD
Supply
Supply Voltage
VSS
Supply
Ground


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