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AD680JRZ1 データシート(PDF) 5 Page - Analog Devices |
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AD680JRZ1 データシート(HTML) 5 Page - Analog Devices |
5 / 12 page AD680 Rev. H | Page 5 of 12 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS * TP DENOTES FACTORY TEST POINT. NO CONNECTIONS SHOULD BE MADE TO THESE PINS. NC = NO CONNECT AD680 TOP VIEW (Not to Scale) TP* 1 +VIN 2 TEMP 3 GND 4 TP* TP* VOUT NC 8 7 6 5 Figure 3. 8-Lead PDIP and 8-Lead SOIC Pin Configuration AD680 BOTTOM VIEW (Not to Scale) 32 1 +VIN VOUT GND Figure 4. Connection Diagram Table 3. Pin Function Descriptions Pin No. Mnemonic Descriptions 1, 7, 8 TP Test Point. A factory test point. No connections are made to these pins. 2 +VIN Input Voltage. 3 TEMP Temperature Output. 4 GND Ground. 5 NC No Connect. 6 VOUT Output Voltage. |
同様の部品番号 - AD680JRZ1 |
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同様の説明 - AD680JRZ1 |
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