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AD5204BRU50-REEL7 データシート(PDF) 9 Page - Analog Devices |
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AD5204BRU50-REEL7 データシート(HTML) 9 Page - Analog Devices |
9 / 20 page AD5204/AD5206 Rev. C | Page 9 of 20 A6 1 W6 2 B6 3 GND 4 B4 24 W4 23 A4 22 B2 21 CS 5 VDD 6 SDI 7 W2 20 A2 19 A1 18 CLK 8 W1 17 VSS 9 B1 16 B5 10 A3 15 W5 11 W3 14 A5 12 B3 13 AD5206 TOP VIEW (Not to Scale) NC = NO CONNECT Figure 8. AD5206 SOIC/TSSOP/PDIP Pin Configuration Table 5. AD5206 Pin Function Descriptions Pin No. Name Description 1 A6 Terminal A RDAC 6. 2 W6 Wiper RDAC 6. Address = 1012. 3 B6 Terminal B RDAC 6. 4 GND Ground. 5 CS Chip Select Input (Active Low). When CS returns high, data in the serial input register is decoded based on the address bits, and then it is loaded into the target RDAC latch. 6 VDD Positive Power Supply. This pin is specified for operation at both 3 V and 5 V. It is the sum of |VDD| + |VSS| < 5.5 V. 7 SDI Serial Data Input. Data is input MSB first. 8 CLK Serial Clock Input. This pin is positive edge triggered. 9 VSS Negative Power Supply. This pin is specified for operation at both 0 V and −2.7 V. It is the sum of |VDD| + |VSS| < 5.5 V. 10 B5 Terminal B RDAC 5. 11 W5 Wiper RDAC 5. Address = 1002. 12 A5 Terminal A RDAC 5. 13 B3 Terminal B RDAC 3. 14 W3 Wiper RDAC 3. Address = 0102. 15 A3 Terminal A RDAC 3. 16 B1 Terminal B RDAC 1. 17 W1 Wiper RDAC 1. Address = 0002. 18 A1 Terminal A RDAC 1. 19 A2 Terminal A RDAC 2. 20 W2 Wiper RDAC 2. Address = 0012. 21 B2 Terminal B RDAC 2. 22 A4 Terminal A RDAC 4. 23 W4 Wiper RDAC 4. Address = 0112. 24 B4 Terminal B RDAC 4. |
同様の部品番号 - AD5204BRU50-REEL7 |
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同様の説明 - AD5204BRU50-REEL7 |
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