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FSBS15CH60L データシート(PDF) 11 Page - List of Unclassifed Manufacturers

部品番号 FSBS15CH60L
部品情報  UL Certified No.E209204(SPM27-BA package)
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www.fairchildsemi.com
FSBS15CH60 Rev. C
Note:
1. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s
printed circuit board. The SPM input signal section integrates 3.3k
Ω (typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the sig-
nal voltage drop at input terminal.
2. The logic input is compatible with standard CMOS or LSTTL outputs.
Figure 9. Recommended CPU I/O Interface Circuit
Note:
1. It would be recommended that the bootstrap diode, DBS, has soft and fast recovery characteristics.
2. The bootstrap resistor (RBS) should be 3 times greater than RE(H). The recommended value of RE(H) is 5.6Ω, but it can be increased up to 20Ω (maximum) for a slower dv/dt of
high-side.
3. The ceramic capacitor placed between VCC-COM should be over 1uF and mounted as close to the pins of the SPM as possible.
Figure 10. Recommended Bootstrap Operation Circuit and Parameters
CPU
COM
5V-Line
1nF
Ω
4.7k
,,
IN
(UL)
IN
(VL)
IN
(W L)
,,
IN
(UH)
IN
(VH)
IN
(W H)
V
FO
Ω
100
1nF
SPM
R
PF=
C
PF=
15V-Line
22uF
0.1uF
1000uF
1uF
One-Leg Diagram of SPM
Vcc
IN
COM
VB
HO
VS
Vcc
IN
COM
OUT
Inverter
Output
P
N
These Values depend on PW M Control Algorithm
D
BS
R
BS
R
E(H)
V
SL


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