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STM32F100VET6BTR データシート(PDF) 72 Page - STMicroelectronics

部品番号 STM32F100VET6BTR
部品情報  High-density value line, advanced ARM-based 32-bit MCU
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
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STM32F100VET6BTR データシート(HTML) 72 Page - STMicroelectronics

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Electrical characteristics
STM32F100xC, STM32F100xD, STM32F100xE
72/98
Doc ID 15081 Rev 7
Output voltage levels
Unless otherwise specified, the parameters given in Table 44 are derived from tests
performed under the ambient temperature and VDD supply voltage conditions summarized
in Table 9. All I/Os are CMOS and TTL compliant.
Table 44.
Output voltage characteristics
Symbol
Parameter
Conditions
Min
Max
Unit
VOL
(1)
1.
The IIO current sunk by the device must always respect the absolute maximum rating specified in Table 7
and the sum of IIO (I/O ports and control pins) must not exceed IVSS.
Output Low level voltage for an I/O pin
when 8 pins are sunk at the same time
CMOS port(2),
IIO = +8 mA,
2.7 V < VDD < 3.6 V
2.
TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
0.4
V
VOH
(3)
3.
The IIO current sourced by the device must always respect the absolute maximum rating specified in
Table 7 and the sum of IIO (I/O ports and control pins) must not exceed IVDD.
Output High level voltage for an I/O pin
when 8 pins are sourced at the same time
VDD–0.4
VOL
(1)
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
TTL port(2)
IIO = +8 mA
2.7 V < VDD < 3.6 V
0.4
V
VOH
(3)
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
2.4
VOL
(1)
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
IIO = +20 mA
(4)
2.7 V < VDD < 3.6 V
4.
Based on characterization data, not tested in production.
1.3
V
VOH
(3)
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
VDD–1.3
VOL
(1)
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
IIO = +6 mA
(4)
2 V < VDD < 2.7 V
0.4
V
VOH
(3)
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
VDD–0.4


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