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AD5544ARSZ データシート(PDF) 5 Page - Analog Devices |
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AD5544ARSZ データシート(HTML) 5 Page - Analog Devices |
5 / 24 page Data Sheet AD5544/AD5554 Rev. G | Page 5 of 24 Parameter Symbol Test Condition/Comments Min Typ Max Unit Clock to SDO Propagation Delay tPD 2 20 ns Load DAC Pulse Width tLDAC 25 ns Data Setup tDS 20 ns Data Hold tDH 20 ns Load Setup tLDS 5 ns Load Hold tLDH 25 ns SUPPLY CHARACTERISTICS Power Supply Range VDD RANGE 2.7 5.5 V Positive Supply Current IDD Logic inputs = 0 V 5 µA Negative Supply Current ISS Logic inputs = 0 V, VSS = −5 V 0.001 9 µA Power Dissipation PDISS Logic inputs = 0 V 1.25 mW Power Supply Sensitivity PSS ∆VDD = ±5% 0.006 %/% AC CHARACTERISTICS4 Output Voltage Settling Time tS To ±0.1% of full scale, data = 0x0000 to 0x3FFF to 0x0000 0.9 µs Reference Multiplying Bandwidth (BW) BW − 3 dB VREFx = 5 V p-p, data = 0xFFFF, CFB = 2.0 pF 12 MHz DAC Glitch Impulse Q VREFx = 8 V, data = 0x0000 to 0x2000 to 0x0000 −1 nV-sec Feedthrough Error VOUTx/VREFx Data = 0x0000, VREFx = 100 mV rms, f = 100 kHz −65 dB Crosstalk Error VOUTA/VREFB Data = 0x0000, VREFB = 100 mV rms, adjacent channel, f = 100 kHz −90 dB Digital Feedthrough Q CS = 1, fCLK = 1 MHz 0.6 nV-sec Total Harmonic Distortion THD VREFx = 5 V p-p, data = 0x3FFF, f = 1 kHz −98 dB Output Spot Noise Voltage eN f = 1 kHz, BW = 1 Hz 7 nV/√Hz 1 All static performance tests (except IOUT) are performed in a closed-loop system using an external precision OP177 I-to-V converter amplifier. The AD5554 RFB terminal is tied to the amplifier output. Typical values represent average readings measured at 25°C. 2 These parameters are guaranteed by design and not subject to production testing. 3 All input control signals are specified with tR = tF = 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V. 4 All ac characteristic tests are performed in a closed-loop system using an AD8038 I-to-V converter amplifier,. |
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