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ADC101S021CIMF データシート(PDF) 5 Page - Texas Instruments |
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ADC101S021CIMF データシート(HTML) 5 Page - Texas Instruments |
5 / 23 page ADC101S021 www.ti.com SNAS307F – JULY 2005 – REVISED MARCH 2013 ADC101S021 Converter Electrical Characteristics (1)(2) (continued) The following specifications apply for VA = +2.7V to 5.25V, fSCLK = 1 MHz to 4 MHz, fSAMPLE = 50 ksps to 200 ksps, CL = 15 pF, unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C. Limits Symbol Parameter Conditions Typical Units (2) DIGITAL OUTPUT CHARACTERISTICS ISOURCE = 200 µA VA − 0.07 VA − 0.2 V (min) VOH Output High Voltage ISOURCE = 1 mA VA − 0.1 V ISINK = 200 µA 0.03 0.4 V (max) VOL Output Low Voltage ISINK = 1 mA 0.1 V IOZH, IOZL TRI-STATE® Leakage Current ±0.1 ±10 µA (max) COUT TRI-STATE® Output Capacitance 2 4 pF (max) Output Coding Straight (Natural) Binary POWER SUPPLY CHARACTERISTICS 2.7 V (min) VA Supply Voltage 5.25 V (max) VA = +5.25V, 1.7 2.4 mA (max) fSAMPLE = 200 ksps Supply Current, Normal Mode (Operational, CS low) VA = +3.6V, 0.65 1.1 mA (max) fSAMPLE = 200 ksps IA fSCLK = 0 MHz, VA = +5.25V 500 nA fSAMPLE = 0 ksps Supply Current, Shutdown (CS high) VA = +5.25V, fSCLK = 4 MHz, 60 µA fSAMPLE = 0 ksps VA = +5.25V 8.9 12.6 mW (max) Power Consumption, Normal Mode (Operational, CS low) VA = +3.6V 2.34 4.0 mW (max) fSCLK = 0 MHz, VA = +5.25V PD 2.6 µW fSAMPLE = 0 ksps Power Consumption, Shutdown (CS high) VA = +5.25V, fSCLK = 4 MHz, 315 µW fSAMPLE = 0 ksps AC ELECTRICAL CHARACTERISTICS 1.0 MHz (min) fSCLK Clock Frequency (3) 4.0 MHz (max) 50 ksps (min) fS Sample Rate (3) 200 ksps (max) 40 % (min) DC SCLK Duty Cycle fSCLK = 4 MHz 50 60 % (max) tACQ Minimum Time Required for Acquisition 350 ns (max) Throughput Time Acquisition Time + Conversion Time 20 SCLK cycles tQUIET (4) 50 ns (min) tAD Aperture Delay 3 ns tAJ Aperture Jitter 30 ps (3) This is the frequency range over which the electrical performance is ensured. The device is functional over a wider range which is specified under Operating Ratings. (4) Minimum Quiet Time required by bus relinquish and the start of the next conversion. Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: ADC101S021 |
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