AD5560 datasheet(11/68 Pages) AD

部品番号	AD5560

部品情報	1.2 A Programmable Device Power Supply with Integrated 16-Bit Level Setting DACs

Download	68 Pages

Scroll/Zoom	100%

メーカー	AD [Analog Devices]

ホームページ	http://www.analog.com

Logo

11 / 68 page

Data Sheet

AD5560

Rev. D | Page 11 of 68

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

SPI INTERFACE LOGIC

Logic Inputs

Input High Voltage, VIH

1.7/2.0

V

(2.3 V to 2.7 V)/(2.7 V to 5.5 V) JEDEC-compliant

input levels.

Input Low Voltage, VIL

0.7/0.8

V

(2.3 V to 2.7 V)/(2.7 V to 5.5 V) JEDEC-compliant

input levels.

Input Current, IINH, IINL

−1

+1

µA

Input Capacitance, CIN1

10

pF

CMOS Logic Outputs

SDO, CPOL, CPOH, GPO, CPO.

Output High Voltage, VOH

DVCC − 0.4

V

Output Low Voltage, VOL

0.4

V

IOL = 500 µA.

Tristate Leakage Current

−1

+1

μA

SDO, CPOL, CPOH, CPO.

Output Capacitance1

10

pF

SDO, CPOL, CPOH, CPO.

Open-Drain Logic Outputs

BUSY, TMPALM, CLALM, KELALM.

Output Low Voltage, VOL

0.4

V

IOL = 500 µA, CL = 50 pF, RPULLUP = 1 kΩ.

Output Capacitance1

10

pF

POWER SUPPLIES

HCAVDD1x

4

28

V

|HCAVDDx – HCAVSSx| < 33 V, HCAVSSx ≥ AVSS,

HCAVDDx ≤ AVDD.

HCAVSS1x

−25

−5

V

HCAVDD2x

4

28

V

|HCAVDDx – HCAVSSx| < 33 V, HCAVSSx ≥ AVSS,

HCAVDDx ≤ AVDD.

HCAVSS2x

−25

−5

V

AVDD

8

28

V

|AVDD – AVSS| < 33 V.

AVSS

−25

−5

V

DVCC

2.3

5.5

V

AIDD4

30

mA

All ranges.

AISS4

−30

mA

All ranges.

DICC

3

mA

AIDD4

27

mA

Channel inhibited/tristate, HW_INH or

SW-INH low.

AISS4

−27

mA

Channel inhibited/tristate, HW_INH or

SW-INH low.

HCAVDDx and HCAVSSx supply currents shown

are excluding load currents; however, for

power budget calculations, the supply currents

here are consumed by the load.

HCAIDD1

20

mA

When enabled, excluding load conditions.

HCAIDD1

0.5

mA

When disabled.

HCAISS1

−20

mA

When enabled, excluding load condition.

HCAISS1

−0.5

mA

When disabled.

HCAIDD2

15

mA

When enabled, excluding load conditions.

HCAIDD2

0.25

mA

When disabled.

HCAISS2

−15

mA

When enabled, excluding load conditions.

HCAISS2

−0.25

mA

When disabled.

POWER-DOWN CURRENTS

Supply currents on power-up or during a

power-down condition.

HCAIDD

250

μA

HCAISS

−250

μA

HCAIDD

250

μA

HCAISS

−250

μA

AIDD

5

mA

AISS

−5

mA

DICC

3

mA

Maximum Power Dissipation

EXTFORCE1

10

W

EXTFORCE2

5

W

Power-Up Overshoot1

5

%

Of programmed value.

同様の部品番号 - AD5560

メーカー	部品番号	データシート	部品情報
Analog Devices	AD5560	2Mb / 67P	1.2 A Programmable Device Power Supply
	AD5560JBCZ	1Mb / 68P	1.2 A Programmable Device Power Supply REV. D
	AD5560JBCZ	2Mb / 67P	1.2 A Programmable Device Power Supply
	AD5560JBCZ-REEL	1Mb / 68P	1.2 A Programmable Device Power Supply REV. D
	AD5560JBCZ-REEL	2Mb / 67P	1.2 A Programmable Device Power Supply

More results

同様の説明 - AD5560

メーカー	部品番号	データシート	部品情報
Analog Devices	AD5522	561Kb / 48P	Quad Parametric Measurement Unit With Integrated 16-Bit Level Setting DACs Rev.PrM
	AD5522	549Kb / 45P	Quad Parametric Measurement Unit With Integrated 16-Bit Level Setting DACs Rev.PrL
	AD5522	1Mb / 60P	Quad Parametric Measurement Unit with Integrated 16-Bit Level Setting DACs REV. A
	AD5522	1Mb / 65P	Quad Parametric Measurement Unit with Integrated 16-Bit Level Setting DACs
	AD5560	2Mb / 67P	1.2 A Programmable Device Power Supply
	AD5560JSVUZ	1Mb / 68P	1.2 A Programmable Device Power Supply REV. D
	ADATE324	89Kb / 2P	1.6 GHz Quad Integrated DCL with VHH Drive Capability, Level Setting DACs, and Rev. Sp0
Maxim Integrated Produc...	MAX5621	533Kb / 16P	16-Bit DACs with 16-Channel Rev 1; 2/05
Analog Devices	ADATE334	72Kb / 2P	2.3 GHz Dual Integrated DCL with PPMU, Level Setting DACs, and On-Chip Calibration Registers
Linear Integrated Syste...	LTC1588	272Kb / 16P	12-/14-/16-Bit SoftSpan DACs with Programmable Output Range