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AD7265BSUZ データシート(PDF) 8 Page - Analog Devices |
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AD7265BSUZ データシート(HTML) 8 Page - Analog Devices |
8 / 28 page AD7265 Rev. A | Page 8 of 28 Pin No. Mnemonic Description 28, 30 DOUTB, DOUTA Serial Data Outputs. The data output is supplied to each pin as a serial data stream. The bits are clocked out on the falling edge of the SCLK input and 14 SCLKs are required to access the data. The data simultaneously appears on both pins from the simultaneous conversions of both ADCs. The data stream consists of two leading zeros followed by the 12 bits of conversion data. The data is provided MSB first. If CS is held low for 16 SCLK cycles rather than 14, then two trailing zeros appear after the 12 bits of data. If CS is held low for a further 16 SCLK cycles on either DOUTA or DOUTB, the data from the other ADC follows on the DOUT pin. This allows data from a simultaneous conversion on both ADCs to be gathered in serial format on either DOUTA or DOUTB using only one serial port. See the Serial Interface section. 31 VDRIVE Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the interface operates. This pin should be decoupled to DGND. The voltage at this pin may be different than that at AVDD and DVDD but should never exceed either by more than 0.3 V. 32 DVDD Digital Supply Voltage, 2.7 V to 5.25 V. This is the supply voltage for all digital circuitry on the AD7265. The DVDD and AVDD voltages should ideally be at the same potential and must not be more than 0.3 V apart even on a transient basis. This supply should be decoupled to DGND. |
同様の部品番号 - AD7265BSUZ |
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同様の説明 - AD7265BSUZ |
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