REV. B

–18–

AD8036/AD8037

Clamping with an Offset

Some op amp circuits are required to operate with an offset

voltage. These are generally configured in the inverting mode

where the offset voltage can be summed in as one of the inputs.

Since AD8036/AD8037 clamping does not function in the in-

verting mode, it is not possible to clamp with this configuration.

Figure 10 shows a noninverting configuration of an AD8037

that provides clamping and also has an offset. The circuit shows

the AD8037 as a driver for an AD9002, an 8-bit, 125 MSPS

A/D converter and illustrates some of the considerations for us-

ing an AD8037 with offset and clamping.

The analog input range of the AD9002 is from ground to –2 V.

The input should not go more than 0.5 V outside this range in

order to prevent disruptions to the internal workings of the A/D

and to avoid drawing excess current. These requirements make

the AD8037 a prime candidate for signal conditioning.

When an offset is added to a noninverting op amp circuit, it is

fed in through a resistor to the inverting input. The result is that

the op amp must now operate at a closed-loop gain greater than

unity. For this circuit a gain of two was chosen which allows the

use of the AD8037. The feedback resistor, R2, is set at 301

Ω

for optimum performance of the AD8037 at a gain of two.

There is an interaction between the offset and the gain, so some

calculations must be performed to arrive at the proper values for

R1 and R3. For a gain of two the parallel combination of resis-

tors R1 and R3 must be equal to the feedback resistor R2. Thus

R1

× R3/R1 + R3 = R2 = 301 Ω

The reference used to provide the offset is the AD780 whose

output is 2.5 V. This must be divided down to provide the 1 V

offset desired. Thus

2.5 V

× R1/(R1 + R3) = 1 V

When the two equations are solved simultaneously we get R1 =

499

Ω and R3 = 750 Ω (using closest 1% resistor values in all

cases). This positive 1 V offset at the input translates to a –1 V

offset at the output.

The usable input signal swing of the AD9002 is 2 V p-p. This is

centered about the –1 V offset making the usable signal range

from 0 V to –2 V. It is desirable to clamp the input signal so that

it goes no more than 100 mV outside of this range in either di-

rection. Thus, the high clamping level should be set at +0.1 V

and the low clamping level should be set at –2.1 V as seen at the

input of the AD9002 (output of AD8037).

Because the clamping is done at the input stage of the AD8037,

the clamping level as seen at the output is affected by not only

the gain of the circuit as previously described, but also by the

The clamping levels as seen at the output can be calculated by

the following:

be kept to a minimum in order to reduce errors due to clamp

59) and will create a voltage drop across whatever resistance is

in series with each clamp input. This extra error voltage is

multiplied by the closed-loop gain of the amplifier and can be

substantial, especially in high closed-loop gain configurations.

A 0.1

µF bypass capacitor should be placed between input

The 1N5712 Schottky diode is used for protection from forward

biasing the substrate diode in the AD9002 during power-up

transients.

Programmable Pulse Generator

The AD8036/AD8037’s clamp output can be set accurately and

has a well controlled flat level. This along with wide bandwidth

and high slew rate make them very well suited for programmable

level pulse generators.

Figure 11 is a schematic for a pulse generator that can directly

accept TTL generated timing signals for its input and generate

pulses at the output up to 24 V p-p with 2500 V/

µs slew rate.

The output levels can be programmed to anywhere in the range

–12 V to +12 V.

100

–0.5V to +0.5V

–2V to 0V

CLAMPING

RANGE

–2.1V to +0.1V

2.5V

+5V

10µF

–5.2V

1N5712

+5V

R2

301

–5V

100

0.1 F10 F

0.1 F

AD8037

0.1 F

10 F

R1

499

49.9

806

+5V

0.1 F

806

–5V

100

R3

750

0.1 F

0.1 F

AD780

49.9

AD9002

SUBSTRATE

DIODE

0.1 F

Figure 10. Gain of Two, Noninverting with Offset AD8037 Driving an AD9002—8-Bit, 125 MSPS A/D Converter