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AD13280AF データシート(PDF) 1 Page - Analog Devices |
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AD13280AF データシート(HTML) 1 Page - Analog Devices |
1 / 28 page Dual-Channel, 12-Bit, 80 MSPS ADC with Analog Input Signal Conditioning AD13280 Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2002–2008 Analog Devices, Inc. All rights reserved. FEATURES Dual 80 MSPS, minimum sample rate Channel-to-channel matching, ±1% gain error 90 dB channel-to-channel isolation DC-coupled signal conditioning 80 dB spurious-free dynamic range Selectable bipolar inputs (±1 V and ±0.5 V ranges) Integral single-pole, low-pass Nyquist filter Twos complement output format 3.3 V compatible outputs 1.85 W per channel APPLICATIONS Radar processing (optimized for I/Q baseband operation) Phased array receivers Multichannel, multimode receivers GPS antijamming receivers Communications receivers PRODUCT HIGHLIGHTS 1. Guaranteed sample rate of 80 MSPS. 2. Input signal conditioning; gain and impedance match. 3. Single-ended, differential, or off-module filter option. 4. Fully tested/characterized full channel performance. FUNCTIONAL BLOCK DIAGRAM TIMING 3 9 12 VREF DROUT 12 ENCODEA ENCODEA D9A D10A D11A (MSB) D0B (LSB) D1B D3B D2B D4B D5B D6B D7B D8B TIMING D9B 7 5 ENCODEB ENCODEB B–IN D10B D11B (MSB) D0A (LSB) D1A D2A D3A D4A D5A D6A D7A D8A AD13280 DROUTA AMP-IN-B-2 AMP-IN-B-1 AMP-IN-A-2 AMP-IN-A-1 AMP-OUT-A A–IN A+IN B+IN AMP-OUT-B DROUTB VREF DROUT 100Ω OUTPUT TERMINATORS 100Ω OUTPUT TERMINATORS Figure 1. |
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