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CA06P2S17ALCG データシート(PDF) 3 Page - EPCOS |
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CA06P2S17ALCG データシート(HTML) 3 Page - EPCOS |
3 / 34 page Features ESD protection level acc. ISO 10605, IEC 61000-4-2 Level 4 Bidirectional protection Low capacitance Low insertion loss Low leakage current No signal distortion RoHS-compatible Suitable for lead-free soldering PSpice simulation models available Customer-specific types on request Applications ESD protection of data lines e.g. in notebooks and portable devices Design Multilayer technology Lack of plastic or epoxy encapsulation for flammability rating better than UL 94 V-0 Termination (see “Soldering directions”): CT and CA types with nickel barrier terminations (AgNiSn), recommended for lead-free soldering, and compatible with tin/lead solder. V/I characteristics and derating curves V/I and derating curves are attached to the data sheet. The curves are sorted by VRMS and then by case size, which is included in the type designation. Single chip Internal circuit Available case sizes: EIA Metric 0603 1608 0805 2012 Array Internal circuit 4-fold array Available case sizes: EIA Metric Version 0612 1632 4-fold array Multilayer varistors (MLVs) Low capacitance series Page 3 of 34 Please read Cautions and warnings and Important notes at the end of this document. |
同様の部品番号 - CA06P2S17ALCG |
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同様の説明 - CA06P2S17ALCG |
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