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USBN9603-28MX データシート(PDF) 27 Page - Texas Instruments |
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USBN9603-28MX データシート(HTML) 27 Page - Texas Instruments |
27 / 62 page 6.0 Functional Description (Continued) 26 www.national.com A packet written to the FIFO is transmitted if an IN token for the respective endpoint is received. If an error condition is de- tected, the packet data remains in the FIFO and transmission is retried with the next IN token. The FIFO contents can be flushed to allow response to an OUT token or to write new data into the FIFO for the next IN token. If an OUT token is received for the FIFO, the firmware is informed that the FIFO has received data only if there was no error condition (CRC or STUFF error). Erroneous receptions are automatically discarded. Transmit Endpoint FIFO Operation (TXFIFO1, TXFIFO2, TXFIFO3) The Transmit FIFOs for Endpoints 1, 3 and 5 support bulk, interrupt and isochronous USB packet transfers larger than the actual FIFO size. Therefore. the firmware must update the FIFO contents while the USB packet is transmitted on the bus. Figure 21 illustrates the operation of the transmit FIFOs. TFxS Transmit FIFO x Size. This is the total number of bytes available within the FIFO. TXRP Transmit Read Pointer. This pointer is incremented every time the Endpoint Controller reads from the transmit FIFO. This pointer wraps around to zero if TFxS is reached. TXRP is never incremented beyond the value of the write pointer TXWP. An underrun condition occurs if TXRP equals TXWP and an attempt is made to transmit more bytes when the LAST bit in the TXCMDx register is not set. TXWP Transmit Write Pointer. This pointer is incremented every time the firmware writes to the transmit FIFO. This pointer wraps around to zero if TFxS is reached. If an attempt is made to write more bytes to the FIFO than actual space available (FIFO overrun), the write to the FIFO is ignored. If so, TCOUNT is checked for an indication of the number of empty bytes remaining. TXFL Transmit FIFO Level. This value indicates how many bytes are currently in the FIFO. A FIFO warning is issued if TXFL decreases to a specific value. The respective WARNx bit in the FWR register is set if TXFL is equal to or less than the number specified by the TFWL bit in the TXCx register. 0x0 + TXRP TXWP TXFL = TXWP - TXRP Tx FIFO X + + TFxS - 1 TCOUNT = TXRP - TXWP (= TFxS - TXFL) FLUSH (Resets TXRP and TXWP) Figure 21. Tx FIFO Operation |
同様の部品番号 - USBN9603-28MX |
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同様の説明 - USBN9603-28MX |
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