TPS2831 datasheet(7/23 Pages) TI1

部品番号	TPS2831

部品情報	SYNCHRONOUS-BUCK MOSFET DRIVERS WITH DEAD-TIME CONTROL

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TPS2834, TPS2835

SYNCHRONOUSBUCK MOSFET DRIVERS

WITH DEADTIME CONTROL

SLVS223B − NOVEMBER 1999 − REVISED AUGUST 2002

7

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

electrical characteristics over recommended operating virtual junction temperature range,

VCC = 6.5 V, ENABLE = High, CL = 3.3 nF (unless otherwise noted) (continued)

dead-time control

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VIH

High-level input voltage

LOWDR

Over the VCC range (see Note 2)

0.7VCC

V

VIL

Low-level input voltage

LOWDR

Over the VCC range (see Note 2)

1

V

VIH

High-level input voltage

DT

Over the VCC range

2

V

VIL

Low-level input voltage

DT

Over the VCC range

1

V

NOTE 2: Ensured by design, not production tested.

digital control terminals (IN, CROWBAR, SYNC, ENABLE)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VIH

High-level input voltage

Over the VCC range

2

V

VIL

Low-level input voltage

Over the VCC range

1

V

switching characteristics over recommended operating virtual junction temperature range,

ENABLE = High, CL = 3.3 nF (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

V(BOOT) = 4.5 V, V(BOOTLO) = 0 V

60

HIGHDR output (see Note 2)

V(BOOT) = 6.5 V, V(BOOTLO) = 0 V

50

ns

Rise time

HIGHDR output (see Note 2)

V(BOOT) = 12 V,

V(BOOTLO) = 0 V

50

ns

Rise time

VCC = 4.5 V

40

LOWDR output (see Note 2)

VCC = 6.5 V

30

ns

LOWDR output (see Note 2)

VCC = 12 V

30

ns

V(BOOT) = 4.5 V,

V(BOOTLO) = 0 V

50

HIGHDR output (see Note 2)

V(BOOT) = 6.5 V, V(BOOTLO) = 0 V

40

ns

Fall time

HIGHDR output (see Note 2)

V(BOOT) = 12 V,

V(BOOTLO) = 0 V

40

ns

Fall time

VCC = 4.5 V

40

LOWDR output (see Note 2)

VCC = 6.5 V

30

ns

LOWDR output (see Note 2)

VCC = 12 V

30

ns

HIGHDR going low (excluding

V(BOOT) = 4.5 V, V(BOOTLO) = 0 V

95

HIGHDR going low (excluding

dead time) (see Note 2)

V(BOOT) = 6.5 V, V(BOOTLO) = 0 V

80

ns

Propagation delay time

dead time) (see Note 2)

V(BOOT) = 12 V,

V(BOOTLO) = 0 V

70

ns

Propagation delay time

LOWDR going high (excluding

dead time) (see Note 2)

V(BOOT) = 4.5 V, V(BOOTLO) = 0 V

80

LOWDR going high (excluding

dead time) (see Note 2)

V(BOOT) = 6.5 V, V(BOOTLO) = 0 V

70

ns

V(BOOT) = 12 V,

V(BOOTLO) = 0 V

60

ns

LOWDR going low (excluding

VCC = 4.5 V

80

Propagation delay time

LOWDR going low (excluding

dead time) (see Note 2)

VCC = 6.5 V

70

ns

Propagation delay time

dead time) (see Note 2)

VCC = 12 V

60

ns

DT to LOWDR and LOWDR to

VCC = 4.5 V

40

170

Driver nonoverlap time

DT to LOWDR and LOWDR to

HIGHDR (see Note 2)

VCC = 6.5 V

25

135

ns

Driver nonoverlap time

HIGHDR (see Note 2)

VCC = 12 V

15

85

ns

NOTE 2: Ensured by design, not production tested.

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