6

UC2886

UC3886

Enabling/Disabling the UC3886 Gate Drive

The CAO/ENBL pin can be used to Disable the UC3886

gate drive by forcing this pin below 0.8V, as shown.

Bringing the voltage below the valley of the PWM oscil-

lator ramp will insure a 0% duty cycle, effectively dis-

abling the gate drive. A low noise open collector signal

should be used as an Enable/Disable command.

APPLICATION INFORMATION (cont.)

Figure 5. Configuring the Current Sense Amplifier

UDG-96024

Figure 6. Enabling/Disabling the UC3886

UDG-96023

Figure 7. The UC3886 Configured in a Buck Regulator

TYPICAL APPLICATIONS

UDG-96025